From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Lech Perczak <lech.perczak@camlingroup.com>,
Andy Shevchenko <andy@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Sasha Levin <sashal@kernel.org>
Subject: [PATCH 6.1.y 1/5] serial: sc16is7xx: fix copy-paste errors in EFR_SWFLOWx_BIT constants
Date: Fri, 21 Aug 2026 10:49:30 -0400 [thread overview]
Message-ID: <20260821144934.3428649-1-sashal@kernel.org> (raw)
In-Reply-To: <2026081755-unbaked-recycled-24ab@gregkh>
From: Lech Perczak <lech.perczak@camlingroup.com>
[ Upstream commit eccdb0fd1c340155666533f5c60c5229d370baab ]
Comments attached to bits 0 and 1 incorrectly referenced bits 2 and 3,
which don't match the datasheet - fix them.
At the same time remove comments for individual constants, as they add
nothing to the definitions themselves.
Signed-off-by: Lech Perczak <lech.perczak@camlingroup.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/2986a485-935d-4ab2-9a16-4a85288aa15a@camlingroup.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Stable-dep-of: 246ac114f485 ("serial: sc16is7xx: enable THRI before filling TX FIFO")
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/tty/serial/sc16is7xx.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 34abce41f92d2..d2469eb026f25 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -263,9 +263,9 @@
* and writing to IER[7:4],
* FCR[5:4], MCR[7:5]
*/
-#define SC16IS7XX_EFR_SWFLOW3_BIT (1 << 3) /* SWFLOW bit 3 */
-#define SC16IS7XX_EFR_SWFLOW2_BIT (1 << 2) /* SWFLOW bit 2
- *
+#define SC16IS7XX_EFR_SWFLOW3_BIT (1 << 3)
+#define SC16IS7XX_EFR_SWFLOW2_BIT (1 << 2)
+ /*
* SWFLOW bits 3 & 2 table:
* 00 -> no transmitter flow
* control
@@ -277,10 +277,10 @@
* XON1, XON2, XOFF1 and
* XOFF2
*/
-#define SC16IS7XX_EFR_SWFLOW1_BIT (1 << 1) /* SWFLOW bit 2 */
-#define SC16IS7XX_EFR_SWFLOW0_BIT (1 << 0) /* SWFLOW bit 3
- *
- * SWFLOW bits 3 & 2 table:
+#define SC16IS7XX_EFR_SWFLOW1_BIT (1 << 1)
+#define SC16IS7XX_EFR_SWFLOW0_BIT (1 << 0)
+ /*
+ * SWFLOW bits 1 & 0 table:
* 00 -> no received flow
* control
* 01 -> receiver compares
--
2.53.0
next prev parent reply other threads:[~2026-08-21 14:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 12:24 FAILED: patch "[PATCH] serial: sc16is7xx: enable THRI before filling TX FIFO" failed to apply to 6.1-stable tree gregkh
2026-08-21 14:49 ` Sasha Levin [this message]
2026-08-21 14:49 ` [PATCH 6.1.y 2/5] serial: sc16is7xx: convert bitmask definitions to use BIT() macro Sasha Levin
2026-08-21 14:49 ` [PATCH 6.1.y 3/5] serial: sc16is7xx: rename EFR mutex with generic name Sasha Levin
2026-08-21 14:49 ` [PATCH 6.1.y 4/5] serial: sc16is7xx: use guards for simple mutex locks Sasha Levin
2026-08-21 14:49 ` [PATCH 6.1.y 5/5] serial: sc16is7xx: enable THRI before filling TX FIFO Sasha Levin
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