From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC083582B87 for ; Wed, 9 Sep 2026 16:26:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788971220; cv=none; b=PdOJF00w6PdI7WP9nTnUe2fHu1591+ag5W8MLIfDz18ra+30HWJZShGJK/emHFUlmfDCWSfDMYLnEjTNyto1UlDOr12Gg0jNPeZSoDF5ziEtk2X7XAHItEzW/U94yOT2X05IyAuyL0TR7FHjP8oBFy725RN60Xa4faui3dFZrsU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788971220; c=relaxed/simple; bh=u6J9FMGYC3kBMH+dkAYKfp6wRrHH3iXD19XuHqE14cs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TyaVr5ovN3qG5zoYbE0XufOj8l7Sf91UXPzWUr/wZYYxB3dbFAGsMwFIhhN+ZJnUwQE14zunZt0WSmH2AErHDcoBx3PcQr+g7TUvuudTO6Hbo7lyFeHBqh616j2BpAo9HzIVlNcGBuAJRcg2n2h8iG09lI/AYU/aNfaGIxkGsbM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hAuVK0x5; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hAuVK0x5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED1771F000FF; Wed, 9 Sep 2026 16:26:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788971218; bh=VrMW+/+QY2NHkZDNHgOUMNfSLtrxHND69GoTKN5vLOk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=hAuVK0x53dT+73OFdp3SQ/SPXTsT9vG2NHn3HTBRxzVaa4DuSeahORfOm6MEXKyIa KvFnyAt48ST/iTOlBBdfU/+IQRja22d9AgWAQIt6Qbm349Q+r4yhQFJ6ipSDstRK/k 49BL32emZV8pgfbk18KhIcSTP8Y8i1wTzz3uXTdDK58ZRGq6TqnoeW25iJX6d7zPdm w+WsF6BxwjDpfoSAXnwe65Syawt9Wf65b8zG/QkuHuht7Q08QyZ+hmsR/iwmuHIvOd gGE9+mllTzL6FD17wRagHPtDagaaZkLH03DyayyuTQZrYF3iX/DCndhh7nGK/uOPIc Miyz3C4Qv0zxw== From: Sasha Levin To: stable@vger.kernel.org Cc: Shyam Sundar S K , Sanket Goswami , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Sasha Levin Subject: [PATCH 6.6.y 1/2] platform/x86/amd/pmc: Move STB functionality to a new file for better code organization Date: Wed, 9 Sep 2026 12:26:54 -0400 Message-ID: <20260909162655.2981787-1-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <2026090307-duly-earmark-1628@gregkh> References: <2026090307-duly-earmark-1628@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Shyam Sundar S K [ Upstream commit 0e914063ddd135407c0550b77a6f5bf779bf8384 ] As the SoC evolves with each generation, the dynamics between the PMC and STB layers within the PMC driver are becoming increasingly complex, making it challenging to manage both in a single file and maintain code readability. Additionally, during silicon bringup, the PMC functionality is often enabled first, with STB functionality added later. This can lead to missed updates in the driver, potentially causing issues. To address these challenges, it's beneficial to move all STB-related changes to a separate file. This approach will better accommodate newer SoCs, provide improved flexibility for desktop variants, and facilitate the collection of additional debug information through STB mechanisms. Also the additional checks for entering s2d_init have been moved from the PMC probe to amd_pmc_s2d_init(). This adjustment makes more sense following the transfer of code to the separate mp1_stb.c file. Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K Link: https://lore.kernel.org/r/20241108070822.3912689-3-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen [Backport dependency for 9cef693bce96bb4c6952f48d855284cf7fa4f367: Move only the existing S2D initializer to mp1_stb.c. Keep the stable STB readers, supported CPU set, debugfs registration order and suspend workarounds; the upstream EFR helper and other STB refactors are not needed on this tree. No new functions are introduced. Rename the moved initializer to amd_stb_s2d_init(), use the named PMC/S2D ports, and place s2d_msg_id in stb_arg so the target applies unchanged. Share the existing STB definitions and enable_stb parameter across the two files. Initialize IP information in the existing guarded probe path immediately before calling the relocated initializer. Retain the stable zero-physical-address check, which upstream dropped in this dependency, and restore MSG_PORT_PMC on that stable-only error path. The target supplies the remaining common error-exit changes.] Stable-dep-of: 9cef693bce96 ("platform/x86/amd/pmc: Restore msg_port on amd_stb_s2d_init() error paths") Signed-off-by: Sasha Levin --- drivers/platform/x86/amd/pmc/Makefile | 2 +- drivers/platform/x86/amd/pmc/mp1_stb.c | 61 +++++++++++++++++++++ drivers/platform/x86/amd/pmc/pmc.c | 75 ++++---------------------- drivers/platform/x86/amd/pmc/pmc.h | 27 +++++++++- 4 files changed, 99 insertions(+), 66 deletions(-) create mode 100644 drivers/platform/x86/amd/pmc/mp1_stb.c diff --git a/drivers/platform/x86/amd/pmc/Makefile b/drivers/platform/x86/amd/pmc/Makefile index 4aaa29d351c90..a0e047a8f8364 100644 --- a/drivers/platform/x86/amd/pmc/Makefile +++ b/drivers/platform/x86/amd/pmc/Makefile @@ -4,5 +4,5 @@ # AMD Power Management Controller Driver # -amd-pmc-objs := pmc.o pmc-quirks.o +amd-pmc-objs := pmc.o pmc-quirks.o mp1_stb.o obj-$(CONFIG_AMD_PMC) += amd-pmc.o diff --git a/drivers/platform/x86/amd/pmc/mp1_stb.c b/drivers/platform/x86/amd/pmc/mp1_stb.c new file mode 100644 index 0000000000000..40ec048ff9eca --- /dev/null +++ b/drivers/platform/x86/amd/pmc/mp1_stb.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * AMD MP1 Smart Trace Buffer (STB) Layer + * + * Copyright (c) 2024, Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Authors: Shyam Sundar S K + * Sanket Goswami + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include + +#include "pmc.h" + +int amd_stb_s2d_init(struct amd_pmc_dev *dev) +{ + u32 phys_addr_low, phys_addr_hi; + u64 stb_phys_addr; + u32 size = 0; + int ret; + + if (!enable_stb) + return 0; + + /* Spill to DRAM feature uses separate SMU message port */ + dev->msg_port = MSG_PORT_S2D; + + amd_pmc_send_cmd(dev, S2D_TELEMETRY_SIZE, &size, dev->stb_arg.s2d_msg_id, true); + if (size != S2D_TELEMETRY_BYTES_MAX) + return -EIO; + + /* Get DRAM size */ + ret = amd_pmc_send_cmd(dev, S2D_DRAM_SIZE, &dev->dram_size, dev->stb_arg.s2d_msg_id, true); + if (ret || !dev->dram_size) + dev->dram_size = S2D_TELEMETRY_DRAMBYTES_MAX; + + /* Get STB DRAM address */ + amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_LOW, &phys_addr_low, dev->stb_arg.s2d_msg_id, true); + amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_HIGH, &phys_addr_hi, dev->stb_arg.s2d_msg_id, true); + + if (!phys_addr_hi && !phys_addr_low) { + dev_err(dev->dev, "STB is not enabled on the system; disable enable_stb or contact system vendor\n"); + dev->msg_port = MSG_PORT_PMC; + return -EINVAL; + } + + stb_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low); + + /* Clear msg_port for other SMU operation */ + dev->msg_port = MSG_PORT_PMC; + + dev->stb_virt_addr = devm_ioremap(dev->dev, stb_phys_addr, dev->dram_size); + if (!dev->stb_virt_addr) + return -ENOMEM; + + return 0; +} diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c index bf6c7ca247e24..07f58a7d255f4 100644 --- a/drivers/platform/x86/amd/pmc/pmc.c +++ b/drivers/platform/x86/amd/pmc/pmc.c @@ -52,10 +52,6 @@ #define AMD_S2D_REGISTER_RESPONSE 0xA80 #define AMD_S2D_REGISTER_ARGUMENT 0xA88 -/* STB Spill to DRAM Parameters */ -#define S2D_TELEMETRY_BYTES_MAX 0x100000 -#define S2D_TELEMETRY_DRAMBYTES_MAX 0x1000000 - /* Base address of SMU for mapping physical address to virtual address */ #define AMD_PMC_MAPPING_SIZE 0x01000 #define AMD_PMC_BASE_ADDR_OFFSET 0x10000 @@ -102,14 +98,6 @@ enum amd_pmc_def { MSG_OS_HINT_RN, }; -enum s2d_arg { - S2D_TELEMETRY_SIZE = 0x01, - S2D_PHYS_ADDR_LOW, - S2D_PHYS_ADDR_HIGH, - S2D_NUM_SAMPLES, - S2D_DRAM_SIZE, -}; - struct amd_pmc_bit_map { const char *name; u32 bit_mask; @@ -140,7 +128,7 @@ static const struct amd_pmc_bit_map soc15_ip_blk[] = { {} }; -static bool enable_stb; +bool enable_stb; module_param(enable_stb, bool, 0644); MODULE_PARM_DESC(enable_stb, "Enable the STB debug mechanism"); @@ -154,7 +142,6 @@ MODULE_PARM_DESC(delay_suspend, "Delays s2idle by 2.5 seconds to work around buggy ECs, often causing keyboard issues after suspend. 0: don't delay, 1: do delay, -1 (default): let amd_pmc decide. If you need this please report this to: platform-driver-x86@vger.kernel.org"); static struct amd_pmc_dev pmc; -static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret); static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf); static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data); @@ -245,12 +232,12 @@ static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp) return -ENOMEM; /* Spill to DRAM num_samples uses separate SMU message port */ - dev->msg_port = 1; + dev->msg_port = MSG_PORT_S2D; /* Get the num_samples to calculate the last push location */ - ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true); + ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->stb_arg.s2d_msg_id, true); /* Clear msg_port for other SMU operation */ - dev->msg_port = 0; + dev->msg_port = MSG_PORT_PMC; if (ret) { dev_err(dev->dev, "error: S2D_NUM_SAMPLES not supported : %d\n", ret); kfree(buf); @@ -304,11 +291,11 @@ static void amd_pmc_get_ip_info(struct amd_pmc_dev *dev) case AMD_CPU_ID_YC: case AMD_CPU_ID_CB: dev->num_ips = 12; - dev->s2d_msg_id = 0xBE; + dev->stb_arg.s2d_msg_id = 0xBE; break; case AMD_CPU_ID_PS: dev->num_ips = 21; - dev->s2d_msg_id = 0x85; + dev->stb_arg.s2d_msg_id = 0x85; break; } } @@ -625,7 +612,7 @@ static void amd_pmc_dump_registers(struct amd_pmc_dev *dev) dev_dbg(dev->dev, "AMD_%s_REGISTER_MESSAGE:%x\n", dev->msg_port ? "S2D" : "PMC", value); } -static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret) +int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret) { int rc; u32 val, message, argument, response; @@ -992,49 +979,6 @@ static const struct pci_device_id pmc_pci_ids[] = { { } }; -static int amd_pmc_s2d_init(struct amd_pmc_dev *dev) -{ - u32 phys_addr_low, phys_addr_hi; - u64 stb_phys_addr; - u32 size = 0; - int ret; - - /* Spill to DRAM feature uses separate SMU message port */ - dev->msg_port = 1; - - /* Get num of IP blocks within the SoC */ - amd_pmc_get_ip_info(dev); - - amd_pmc_send_cmd(dev, S2D_TELEMETRY_SIZE, &size, dev->s2d_msg_id, true); - if (size != S2D_TELEMETRY_BYTES_MAX) - return -EIO; - - /* Get DRAM size */ - ret = amd_pmc_send_cmd(dev, S2D_DRAM_SIZE, &dev->dram_size, dev->s2d_msg_id, true); - if (ret || !dev->dram_size) - dev->dram_size = S2D_TELEMETRY_DRAMBYTES_MAX; - - /* Get STB DRAM address */ - amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_LOW, &phys_addr_low, dev->s2d_msg_id, true); - amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_HIGH, &phys_addr_hi, dev->s2d_msg_id, true); - - if (!phys_addr_hi && !phys_addr_low) { - dev_err(dev->dev, "STB is not enabled on the system; disable enable_stb or contact system vendor\n"); - return -EINVAL; - } - - stb_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low); - - /* Clear msg_port for other SMU operation */ - dev->msg_port = 0; - - dev->stb_virt_addr = devm_ioremap(dev->dev, stb_phys_addr, dev->dram_size); - if (!dev->stb_virt_addr) - return -ENOMEM; - - return 0; -} - static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data) { int err; @@ -1118,7 +1062,10 @@ static int amd_pmc_probe(struct platform_device *pdev) mutex_init(&dev->lock); if (enable_stb && amd_pmc_is_stb_supported(dev)) { - err = amd_pmc_s2d_init(dev); + /* Get num of IP blocks within the SoC */ + amd_pmc_get_ip_info(dev); + + err = amd_stb_s2d_init(dev); if (err) goto err_pci_dev_put; } diff --git a/drivers/platform/x86/amd/pmc/pmc.h b/drivers/platform/x86/amd/pmc/pmc.h index bea65810de5ab..a444804cc830d 100644 --- a/drivers/platform/x86/amd/pmc/pmc.h +++ b/drivers/platform/x86/amd/pmc/pmc.h @@ -14,6 +14,27 @@ #include #include +/* STB Spill to DRAM Parameters */ +#define S2D_TELEMETRY_BYTES_MAX 0x100000 +#define S2D_TELEMETRY_DRAMBYTES_MAX 0x1000000 + +enum s2d_arg { + S2D_TELEMETRY_SIZE = 0x01, + S2D_PHYS_ADDR_LOW, + S2D_PHYS_ADDR_HIGH, + S2D_NUM_SAMPLES, + S2D_DRAM_SIZE, +}; + +enum s2d_msg_port { + MSG_PORT_PMC, + MSG_PORT_S2D, +}; + +struct stb_arg { + u32 s2d_msg_id; +}; + struct amd_pmc_dev { void __iomem *regbase; void __iomem *smu_virt_addr; @@ -25,7 +46,7 @@ struct amd_pmc_dev { u32 active_ips; u32 dram_size; u32 num_ips; - u32 s2d_msg_id; + struct stb_arg stb_arg; /* SMU version information */ u8 smu_program; u8 major; @@ -56,4 +77,8 @@ void amd_pmc_quirks_init(struct amd_pmc_dev *dev); #define AMD_CPU_ID_SP 0x14A4 #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 +extern bool enable_stb; +int amd_stb_s2d_init(struct amd_pmc_dev *dev); +int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret); + #endif /* PMC_H */ -- 2.53.0