From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7659A369D72; Sat, 12 Sep 2026 08:07:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789200469; cv=none; b=U0qO6+T2mvBUFEWx2ZYfWr3YGXRUhpGNZ5vnm7YYtlDiF2KwCXT0h7PRpPCqWgZbz2ChJApTHpLVr44Ge3h3kDy8FQomO935gnx1n/LZGBPnH2nF4czbNMENv+9FO0Tw3QHgTMCQYlHaPcqRIQ7tBIVHy5V1bjZZZIVoFrV8Skk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789200469; c=relaxed/simple; bh=1z/BcY6RelhApVdnRCzTqPHu4c1o+Ycuhf+kpCRrOts=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EoNsO8hYuZ7CHGTXGPxtpa5fwtIw5Ia1rsRZeY+TJVWP/a9GJzhpigX5K6eDFYotJvm2yelOwi6nDeMbNkpwuHYN4mBB0thppi6L2ZZ7hBbB9uFAXmrxkcq9RyTeRrRFp3JdZHlq8OXS/WXZaEnkuSHSU+9Ef9lWs0cldn+ED9Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=uvVye21b; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="uvVye21b" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6BA461F000FF; Sat, 12 Sep 2026 08:07:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789200468; bh=vZjE9+SeLPjYF76CONjfs75DoJri5j9kX436tkTw0SU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=uvVye21bp048iTQIUPPSWYunM/UTUxJpyOqR5D7DVyPPFdpwUBMtaIxiiaohda0mW aDXcRP2inJd4mygMhbK5GCYyLXtkLBXOUveqeTR/8HYlODnqNhkizg3J2KOGI5Gpiq Sm2yHTBJ3hnjQtQQ4lBVXSwEsvDjBpYU3JdNlpig= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Manivannan Sadhasivam , Konrad Dybcio , Dmitry Baryshkov , Bjorn Andersson , Sasha Levin Subject: [PATCH 7.2 0796/1815] arm64: dts: qcom: kaanapali: Fix the PCIe iommu-map entries Date: Sat, 12 Sep 2026 08:42:26 +0200 Message-ID: <20260912065707.596641608@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065648.999753832@linuxfoundation.org> References: <20260912065648.999753832@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.2-stable review patch. If anyone has any objections, please let me know. ------------------ From: Manivannan Sadhasivam [ Upstream commit 35eda0e5f87d52ed9f015f8a44155e8ab2ad9c5a ] The IOMMU provider apps_smmu uses '#iommu-cells = <2>', but the PCIe iommu-map entries specify only one cell for the SID, omitting the SID mask. This went unnoticed until the OF core started warning with commit ccb2fd725d41 ("of: Respect #{iommu,msi}-cells in maps"): iommu-map has 1-cell entries targeting 2-cell #iommu-cells, treating as 1-cell output So fix the entries to match the provider's '#iommu-cells' property. Fixes: 2eeb5767d53f ("arm64: dts: qcom: Introduce Kaanapali SoC") Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260730-iommu-map-fix-v1-1-83405d37ba41@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi index 7aa9653bd456e..011fb00beb0ea 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -2310,8 +2310,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, operating-points-v2 = <&pcie0_opp_table>; - iommu-map = <0 &apps_smmu 0x1400 0x1>, - <0x100 &apps_smmu 0x1401 0x1>; + iommu-map = <0 &apps_smmu 0x1400 0x0 0x1>, + <0x100 &apps_smmu 0x1401 0x0 0x1>; interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, -- 2.53.0