From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794064818; b=OGUMa9StjVwzH5pfEJGJAOf4kksY2n6AwyIYmqHg/wq4t4WiIZBWcNjViOE7ltYpWut5 hkWZZIKD3abqf0+D5Mjf2IeyNFMpOcIURHaypLE/WnSfPAsv6yjJFrS+BCfiT9bttWQgx W10OMQYVsQ8oVA4athbve12iFDwlZLjmJ0qSUv8PfHUpv+UqC4fpczcGlfs0ZY9o4SixK q4ZV5NoT+4ek/qGnkwxHHG0R8KQ5Xc2/14gMaaBYg/7fz7FQ1qkzoK8rUcjjYQzN4LaTb mDi4VjlnT9uDIsCXS2+coWmaQTP2t4Vhofu8YWHaYD7EXVeyrfkCywBGu5cPnqeUp0A== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794064818; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:User-Agent:X-stable:X-Patchwork-Hint: MIME-Version:Content-Transfer-Encoding; bh=MkVr+laVLuzdJ/g21EZ81WK8Srqn8p8e6ktPJ28P3kU=; b=5Yx6HM3j/RFN1Go7yDyPLPLh61Cv2N80bj/qVSAcW3f9iIc1JZ3akUGjsToJvewexc72 ESChtkp8CxZMR8eNvnbZGogva7UBXsBW+woA0rfcmv0WMK3IKiaWiH5zMQzROtZi1ULoW rchtAFglbHA8vHZvCIsI7kMBIfxc/o1g8yjSN1y/tyzoeR+gADLB7dd9Gf/CrAJWmMQE8 qdHoIgdsR+PzLkoZcDtJMAwQ3ivZjCQht9mJpe3MdRrhFjbHjuk4xfx3cVq2ekcILN5kA KErIArBBUHf7CSefZUc8gSkHLDD5Bse1cH1v8GVTDoTtgRZplvudG19zcpVX+T/56TQ== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=2OKp8ynK; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B6FB606B88F; Sat, 7 Nov 2026 15:20:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=2OKp8ynK Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7100F1F0089F; Sat, 7 Nov 2026 15:20:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1794064818; bh=MkVr+laVLuzdJ/g21EZ81WK8Srqn8p8e6ktPJ28P3kU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2OKp8ynKr6JAWXcascqIsOjvlDwUMLZQ1+Pxre7kCnPBNtjC7kZASrzE0HqMGRf9T YHILqxlViVFYJrE2NkygZo3L07jSsqGc2TiRMkGqyJJ88y7yz5qUmEeSOOyhYWovOx qCEEvmB5bnY8QozgsyKkRVUeoKc5mInwf6ilPKVA= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dragan Simic , Shawn Lin , Geraldo Nascimento , Manivannan Sadhasivam , Bjorn Helgaas , Sasha Levin Subject: [PATCH 7.3 0716/1257] PCI: rockchip-host: Do not attempt 5.0 GT/s retraining Date: Sat, 7 Nov 2026 08:50:12 -0500 Message-ID: <20261107134959.035928820@linuxfoundation.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261107134939.434104957@linuxfoundation.org> References: <20261107134939.434104957@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore X-Mailing-List: stable@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.3-stable review patch. If anyone has any objections, please let me know. ------------------ From: Geraldo Nascimento [ Upstream commit 2a1e6c382fb7567679c07bd6a7060fefc7a5edc9 ] Drop the 5.0 GT/s Link Speed retraining from Rockchip PCIe Root Complex Mode Operation, so-called host driver. The reason is that Shawn Lin from Rockchip has reiterated that there may be danger of "catastrophic failure" in using their PCIe with 5.0GT/s speeds. While Rockchip has done so informally without issuing a proper errata, and the particulars are thus unknown, this may cause data loss or worse. This change is corroborated by RK3399 official datasheet [1], which states maximum link speed for this platform is 2.5 GT/s. [1] https://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Datasheet_V2.1-20200323.pdf Fixes: e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support") Reported-by: Dragan Simic Reported-by: Shawn Lin Link: https://lore.kernel.org/all/ffd05070-9879-4468-94e3-b88968b4c21b@rock-chips.com/ Signed-off-by: Geraldo Nascimento Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Reviewed-by: Dragan Simic Reviewed-by: Shawn Lin Cc: stable@vger.kernel.org Link: https://patch.msgid.link/68f6353e3a2ea4914de36c42b6906e41282adad3.1781622998.git.geraldogabriel@gmail.com Signed-off-by: Sasha Levin --- drivers/pci/controller/pcie-rockchip-host.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c index d203c4876d304..0b52f2e370f41 100644 --- a/drivers/pci/controller/pcie-rockchip-host.c +++ b/drivers/pci/controller/pcie-rockchip-host.c @@ -328,26 +328,6 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip) goto err_power_off_phy; } - if (rockchip->link_gen == 2) { - /* - * Enable retrain for gen2. This should be configured only after - * gen1 finished. - */ - status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL2); - status &= ~PCI_EXP_LNKCTL2_TLS; - status |= PCI_EXP_LNKCTL2_TLS_5_0GT; - rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL2); - status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); - status |= PCI_EXP_LNKCTL_RL; - rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); - - err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, - status, PCIE_LINK_IS_GEN2(status), 20, - 500 * USEC_PER_MSEC); - if (err) - dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n"); - } - /* Check the final link width from negotiated lane counter from MGMT */ status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL); status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >> -- 2.53.0