From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Weili Qian <qianweili@huawei.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Sasha Levin <sashal@kernel.org>
Subject: [PATCH 5.10.y 4/4] crypto: hisilicon/hpre - fix GFP flags for dma_alloc_coherent
Date: Mon, 9 Nov 2026 22:45:18 -0500 [thread overview]
Message-ID: <20261110034443.239021-4-sashal@kernel.org> (raw)
In-Reply-To: <20261110034443.239021-1-sashal@kernel.org>
From: Weili Qian <qianweili@huawei.com>
[ Upstream commit 40ec9605cb195e065470f8f23ef94b1b541411a3 ]
The HPRE driver hard-codes GFP_ATOMIC for RSA/DH and GFP_KERNEL for
ECDH. This may cause "scheduling while atomic" in atomic context or
unnecessary allocation failures under memory pressure.
Select GFP flags dynamically based on CRYPTO_TFM_REQ_MAY_SLEEP and
store them in hpre_asym_request::flags. The areq field is a union of
rsa/dh/ecdh request pointers; reading base.flags through any union
member other than the one that was written would be type-punning, so
a dedicated flags field avoids that.
Fixes: 98dfa9343f37 ("crypto: hisilicon/hpre - don't use GFP_KERNEL to alloc mem during softirq")
Cc: stable@vger.kernel.org
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
[ sashal: Omitted ECDH changes because the driver lacks ECDH support. ]
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/crypto/hisilicon/hpre/hpre_crypto.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
index 7501092463354..89bc8b164e74a 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
@@ -96,6 +96,7 @@ struct hpre_asym_request {
int req_id;
hpre_cb cb;
struct timespec64 req_time;
+ u32 flags;
};
static int hpre_alloc_req_id(struct hpre_ctx *ctx)
@@ -201,6 +202,7 @@ static int hpre_prepare_dma_buf(struct hpre_asym_request *hpre_req,
struct scatterlist *data, unsigned int len,
int is_src, dma_addr_t *tmp)
{
+ gfp_t gfp = hpre_req->flags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL : GFP_ATOMIC;
struct hpre_ctx *ctx = hpre_req->ctx;
struct device *dev = HPRE_DEV(ctx);
void *ptr;
@@ -210,7 +212,7 @@ static int hpre_prepare_dma_buf(struct hpre_asym_request *hpre_req,
if (unlikely(shift < 0))
return -EINVAL;
- ptr = dma_alloc_coherent(dev, ctx->key_sz, tmp, GFP_ATOMIC);
+ ptr = dma_alloc_coherent(dev, ctx->key_sz, tmp, gfp);
if (unlikely(!ptr))
return -ENOMEM;
@@ -455,6 +457,7 @@ static int hpre_msg_request_set(struct hpre_ctx *ctx, void *req, bool is_rsa)
h_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
h_req->cb = hpre_rsa_cb;
h_req->areq.rsa = akreq;
+ h_req->flags = akreq->base.flags;
msg = &h_req->req;
memset(msg, 0, sizeof(*msg));
} else {
@@ -469,6 +472,7 @@ static int hpre_msg_request_set(struct hpre_ctx *ctx, void *req, bool is_rsa)
h_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
h_req->cb = hpre_dh_cb;
h_req->areq.dh = kreq;
+ h_req->flags = kreq->base.flags;
msg = &h_req->req;
memset(msg, 0, sizeof(*msg));
msg->key = cpu_to_le64(ctx->dh.dma_xa_p);
--
2.53.0
prev parent reply other threads:[~2026-11-10 3:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-07 11:16 FAILED: patch "[PATCH] crypto: hisilicon/hpre - fix GFP flags for dma_alloc_coherent" failed to apply to 5.10-stable tree Sasha Levin
2026-11-10 3:45 ` [PATCH 5.10.y 1/4] crypto: hisilicon/hpre - add version adapt to new algorithms Sasha Levin
2026-11-10 3:45 ` [PATCH 5.10.y 2/4] crypto: hisilicon/hpre - add algorithm type Sasha Levin
2026-11-10 3:45 ` [PATCH 5.10.y 3/4] crypto: ecc - expose ecc curves Sasha Levin
2026-11-10 3:45 ` Sasha Levin [this message]
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