From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794311793; b=yoJqbVmLrTBehS5+JO4+qI1qWtxzMYcj7STldXu9yel9mOulLVlw1bVTKb/nABEbv1Yh V03x4ZauEKwGB3olD33H/v+LM4Le8V/RS8DLqiDjun2xv5AXJ7G9JGEtfhCgxnJ77Um4F ZoBf872aDhkPx3zei8bM3d2dpqcdUo8I7cjBO7k7wB859Vs+JMkgoJTZsBu8SgN9Z2/Qn O59N0W69nhoV1bWxwEAaKW8VLYw6tRvS+EPc+W7jLvQY3eQwn6Xm0cFv6mKq5iGB+W/yN +pEkxge4vjc7VVAvXc8R5z6JZFzTBikik8NS9Ypw04BJDsZsIT4GdVS4e1ObU2rz/UQ== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794311793; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:Content-Transfer-Encoding; bh=uAhC7+bc7pDGSczWRIXY5fP77FG6OBPFLcMrYrOyr+Y=; b=GARjTc9ZyEwU8HSB0LiKUG7hWnSStWaxoLq0RtFg4A5jqFvBWRr3QmsysgfCsN2wpf46 a5SWWoi8ZewQl4MAdaSlTXDxlYOkgG7EL7xGOztWtT91OfJYJOm53h0GH3w/AEstA4GWK aGwdcbdHxqYMrmWaIXm5C+wA7dSkLFo0L1mQJjzyCvdB2+YDaSB4ka335xxlCJjOxcjI1 2iEFTS0CD4maW1UQjrT6iCrAxn5ttX6Z4SjbAxYxdmW1G6UTN3xaoVxwbaLNAVjTUb9Ak kjhaoHDI8CL6e0Tdvbqfz7jRUoMsSNt9R1P7Mdr96NO6rvSLSnMnnQPKxUa4u2AXaxg== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=eRJu83na; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21402606A339 for ; Tue, 10 Nov 2026 11:56:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=eRJu83na Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17A321F008A4; Tue, 10 Nov 2026 11:56:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794311792; bh=uAhC7+bc7pDGSczWRIXY5fP77FG6OBPFLcMrYrOyr+Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eRJu83na9O84+6q7CPr26EMlSr0Y5EqMpDjSbTbEW67wd1lpsPGD2lHAZg/jNN07m 9idvQ8yLgwszJDMNo3Dq7RbNslbCySiAT1zbL2SIrSdq6zeLjyzogwiQPvdAQooamu Mw2pGSREF51tkBtn+yOdCAOM9SsXfsmYvWOk3ovrnrzxaqszK8YodWrX+MWw7ngLJX 0U8CB0cFACOibxpxzs6OOc5tGbUWIKAml7GvuOMEwuYJDcHq7NUZlPWH3FL4ycaEgj DWbLXeZqODcJxq1p8TO5kDMX56nkghPycSLJ5cBMYfKx3F8fMbJWdUBDP5mh99wAAo dsdfrFOP/WnrQ== From: Sasha Levin To: stable@vger.kernel.org Cc: Balakrishnan Sambath , Eugen Hristev , Hans Verkuil , Sasha Levin Subject: [PATCH 6.18.y 1/3] media: microchip-isc: store the unshifted PFE_CFG0 BPS value Date: Tue, 10 Nov 2026 06:56:28 -0500 Message-ID: <20261110115623.918583-1-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261107050633-failed-6.18-bb96c78c5f87@kernel.org> References: <20261107050633-failed-6.18-bb96c78c5f87@kernel.org> X-Mailing-List: stable@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Balakrishnan Sambath [ Upstream commit 14cbe597504a04c5c49342d0566438e2b438a948 ] pfe_cfg0_bps held a pre-shifted BPS value (ISC_PFE_CFG0_BPS_EIGHT was 0x4 << 28) ORed straight into the register. The other format selectors like cfa_baycfg store the bare field value and position it at the write, so this one was inconsistent. Store the bare BPS value and apply it with FIELD_PREP() at the PFE_CFG0 write, and fix the pfe_cfg0_bps comment to match. No functional change. Suggested-by: Eugen Hristev Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev Signed-off-by: Hans Verkuil Stable-dep-of: bb96c78c5f87 ("media: microchip-isc: fix SBGGR10 Bayer pattern") Signed-off-by: Sasha Levin --- drivers/media/platform/microchip/microchip-isc-base.c | 4 +++- drivers/media/platform/microchip/microchip-isc-regs.h | 10 +++++----- drivers/media/platform/microchip/microchip-isc.h | 4 +++- 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/drivers/media/platform/microchip/microchip-isc-base.c index 85cd86bed7ba9..963d5fd53b589 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -8,6 +8,7 @@ * Author: Eugen Hristev * */ +#include #include #include #include @@ -291,7 +292,8 @@ static int isc_configure(struct isc_device *isc) struct isc_subdev_entity *subdev = isc->current_subdev; int ret; - pfe_cfg0 = isc->config.sd_format->pfe_cfg0_bps; + pfe_cfg0 = FIELD_PREP(ISC_PFE_CFG0_BPS_MASK, + isc->config.sd_format->pfe_cfg0_bps); pipeline = isc->config.bits_pipeline; dcfg = isc->config.dcfg_imode | isc->dcfg; diff --git a/drivers/media/platform/microchip/microchip-isc-regs.h b/drivers/media/platform/microchip/microchip-isc-regs.h index 166f57e6ed5d7..cabecf128b37a 100644 --- a/drivers/media/platform/microchip/microchip-isc-regs.h +++ b/drivers/media/platform/microchip/microchip-isc-regs.h @@ -31,11 +31,11 @@ #define ISC_PFE_CFG0_MODE_PROGRESSIVE (0x0 << 4) #define ISC_PFE_CFG0_MODE_MASK GENMASK(6, 4) -#define ISC_PFE_CFG0_BPS_EIGHT (0x4 << 28) -#define ISC_PFG_CFG0_BPS_NINE (0x3 << 28) -#define ISC_PFG_CFG0_BPS_TEN (0x2 << 28) -#define ISC_PFG_CFG0_BPS_ELEVEN (0x1 << 28) -#define ISC_PFG_CFG0_BPS_TWELVE (0x0 << 28) +#define ISC_PFE_CFG0_BPS_EIGHT 0x4 +#define ISC_PFG_CFG0_BPS_NINE 0x3 +#define ISC_PFG_CFG0_BPS_TEN 0x2 +#define ISC_PFG_CFG0_BPS_ELEVEN 0x1 +#define ISC_PFG_CFG0_BPS_TWELVE 0x0 #define ISC_PFE_CFG0_BPS_MASK GENMASK(30, 28) #define ISC_PFE_CFG0_COLEN BIT(12) diff --git a/drivers/media/platform/microchip/microchip-isc.h b/drivers/media/platform/microchip/microchip-isc.h index f5e322c2e36bc..d7bcd74efff92 100644 --- a/drivers/media/platform/microchip/microchip-isc.h +++ b/drivers/media/platform/microchip/microchip-isc.h @@ -62,7 +62,9 @@ struct isc_subdev_entity { * @mbus_code: V4L2 media bus format code. * @cfa_baycfg: If this format is RAW BAYER, indicate the type of bayer. this is either BGBG, RGRG, etc. - * @pfe_cfg0_bps: Number of hardware data lines connected to the ISC + * @pfe_cfg0_bps: ISC_PFE_CFG0 BPS field value (e.g. ISC_PFE_CFG0_BPS_EIGHT), + written into PFE_CFG0 with FIELD_PREP(ISC_PFE_CFG0_BPS_MASK) + at configure time. * @raw: If the format is raw bayer. */ -- 2.53.0