From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794585463; b=pk713HSvRps/MnvHVjDEoi6AlC6AfdApucdFrGQXYBnqo4yuiDKxtj9Ul4zy5q9Tbw2k K5PFGbQgX+fTY6UvXqd9+aufcsgodKXtQrssGvmTbVPJQFqwI+MErsA7/Ywb3M1nJ77kG fshQQ6H2pSdJGC5KqiCER9U/vul+YDWzaI3xNw2Me7f6MjVKiEVfVbfl8vNNh3qOyrjfL +oHwdb1A80AxNf840qXNLDcG6xcadJR9cnUqgTByMXWjUzU9Wk5DZKwmoVQXkzhoXQ+b8 h7X0oU1bqiLsUhUdyMUhqXuqWFv175YM8jxj0eWfvhNk+pzMFCXl1xxn+Dz829qrPSw== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794585463; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:User-Agent:X-stable:X-Patchwork-Hint: MIME-Version:Content-Type:Content-Transfer-Encoding; bh=U0w7CcjXrDd0DwxwVGfNMXYFVV0nGPG4MfviDvyekOI=; b=UznKl4C5pjm0/eLDjXeny6AApQgd0uz7/HrCmS7EzW+eiSE0FrQ5ErvWh0Wg6Cc6DWPx NrIgcsXI4nqQWsgkAoQ2p5DUih1fGVXEwQculY4r2kE/ow/JTZoHwOW0ycWMSwMx1owQA IYtZAjewM/+00eo3OE5JSM9iXd3cuY7A3w6hNu2AeP7Em2StL8O7ZoYmp/lIZov3yBerr BM8MCBltwj+nHHUHjxF22MUn5yYNdYY8bgp1L9seMYb/hQGw5J6XShuUE9qPqDkQUEorm ldxtsccNZQbin41Zkieuyr8CFe1LfgypUT/qMZsNuL6wVkW+emAk6E41g6cq+utpTfg== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b="X0mF/Z3f"; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4841F606A33E; Fri, 13 Nov 2026 15:57:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=X0mF/Z3f Received: by smtp.kernel.org (Postfix) with ESMTPSA id E914A1F000C5; Fri, 13 Nov 2026 15:57:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1794585463; bh=U0w7CcjXrDd0DwxwVGfNMXYFVV0nGPG4MfviDvyekOI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=X0mF/Z3fiIyUYvAOme3vbFMK6ges0uX9UZN4QLu0kE6oSgEfTqLWgl5nvyoND9SYj xxye2ylFLa7ajBaMTSOlR+ZXkCXp0SEw8E70HY65CPVel2RYJK6j2+BJ5yokpWln22 OsEeduOJ6+lnjjVswOGrvZOBpB8OERL4K2VEQBZw= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, =?UTF-8?q?Jouni=20H=C3=B6gander?= , Mika Kahola , Joonas Lahtinen , Sasha Levin Subject: [PATCH 7.3 119/507] drm/i915/psr: Clear selective fetch area when duplicating plane state Date: Fri, 13 Nov 2026 10:47:03 -0500 Message-ID: <20261113153758.415827418@linuxfoundation.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261113153753.358973689@linuxfoundation.org> References: <20261113153753.358973689@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore X-Mailing-List: stable@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 7.3-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jouni Högander [ Upstream commit cbe565475988d3b22dc36f13c14d9f0eec1685cd ] We are currently not clearing selective fetch area when duplicating plane state. This is causing problem when plane is re-used for another purpose. Fix this by clearing selective fetch area when duplicating plane state. Now as the state is cleared we need to ensure we have consistent selective fetch area in plane state on full update. Earlier this was relying on selective fetch area being copied from old state on state duplicate. Now this isn't true anymore as we are clearing it. Tackle this by setting full plane area as selective fetch area for each plane on full update. Rename the label as skip_su_area_calc as the loop setting the plane selective fetch area is not skipped anymore. Move also psr2_sel_fetch_pipe_state_supported check after psr2_su_area initialization. The loop is run on full update as well now and it needs initialized psr2_su_area. Clip_area_update is only touching rect height and x1/x2 are left untouched. Don't set the area at all for planes not intersecting with the selective update area. It is already zero sized after plane state duplicate. Fixes: efab47658a6c ("drm/i915/display/psr: Calculate selective fetch plane registers") Cc: # v5.12+ Assisted-by: GitHub-Copilot:claude-opus-5 Signed-off-by: Jouni Högander Reviewed-by: Mika Kahola Link: https://patch.msgid.link/20260929094434.77129-2-jouni.hogander@intel.com (cherry picked from commit bd58f0e221386808cd614bb205112e807dc6b159) Signed-off-by: Joonas Lahtinen Signed-off-by: Sasha Levin --- drivers/gpu/drm/i915/display/intel_plane.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 24 ++++++++++------------ 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c index d0f99a87c42e8..d0e7309483234 100644 --- a/drivers/gpu/drm/i915/display/intel_plane.c +++ b/drivers/gpu/drm/i915/display/intel_plane.c @@ -140,6 +140,7 @@ intel_plane_duplicate_state(struct drm_plane *plane) intel_state->dpt_vma = NULL; intel_state->fence_id = -1; intel_state->damage = DRM_RECT_INIT(0, 0, 0, 0); + intel_state->psr2_sel_fetch_area = DRM_RECT_INIT(0, 0, 0, 0); /* add reference to fb */ if (intel_state->hw.fb) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index c28bcb1a01841..15421b0a3bb0d 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2913,16 +2913,16 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, if (!crtc_state->enable_psr2_sel_fetch) return 0; - if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) { - full_update = true; - goto skip_sel_fetch_set_loop; - } - crtc_state->psr2_su_area.x1 = 0; crtc_state->psr2_su_area.y1 = -1; crtc_state->psr2_su_area.x2 = drm_rect_width(&display_area); crtc_state->psr2_su_area.y2 = -1; + if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) { + full_update = true; + goto skip_su_area_calc; + } + /* * Calculate minimal selective fetch area of each plane and calculate * the pipe damaged area. @@ -3006,7 +3006,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, } if (full_update) - goto skip_sel_fetch_set_loop; + goto skip_su_area_calc; intel_psr_apply_su_area_workarounds(crtc_state); @@ -3042,6 +3042,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, break; } while (su_area_changed); +skip_su_area_calc: + if (full_update) + clip_area_update(&crtc_state->psr2_su_area, &display_area, + &display_area); + /* * Now that we have the pipe damaged area check if it intersect with * every plane, if it does set the plane selective fetch area. @@ -3058,8 +3063,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, inter = crtc_state->psr2_su_area; sel_fetch_area = &new_plane_state->psr2_sel_fetch_area; if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst)) { - sel_fetch_area->y1 = -1; - sel_fetch_area->y2 = -1; /* * if plane sel fetch was previously enabled -> * disable it @@ -3099,11 +3102,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, } } -skip_sel_fetch_set_loop: - if (full_update) - clip_area_update(&crtc_state->psr2_su_area, &display_area, - &display_area); - psr2_man_trk_ctl_calc(crtc_state, full_update); crtc_state->pipe_srcsz_early_tpt = psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update); -- 2.53.0