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[2001:4c4e:24de:e400:df31:21e4:6476:b2bd]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488d531f1f9sm363581155e9.1.2026.04.13.08.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Apr 2026 08:25:44 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: Rosen Penev , Greg Kroah-Hartman Cc: Harshit Mogalapalli , stable@vger.kernel.org, patches@lists.linux.dev, Alex Deucher , Mario Limonciello , Vegard Nossum Subject: Re: [PATCH 6.12 230/242] drm/amd/display: Reject modes with too high pixel clock on DCE6-10 Date: Mon, 13 Apr 2026 17:25:42 +0200 Message-ID: <20304292.fSG56mABFh@timur-max> In-Reply-To: <2026041152-slogan-chariot-c87b@gregkh> References: <20260408175927.064985309@linuxfoundation.org> <2026041152-slogan-chariot-c87b@gregkh> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On 2026. =C3=A1prilis 11., szombat 11:49:04 k=C3=B6z=C3=A9p-eur=C3=B3pai ny= =C3=A1ri id=C5=91 Greg Kroah- Hartman wrote: > On Fri, Apr 10, 2026 at 02:20:42PM -0700, Rosen Penev wrote: > > On Fri, Apr 10, 2026 at 12:08=E2=80=AFPM Harshit Mogalapalli > >=20 > > wrote: > > > Hi, > > >=20 > > > On 08/04/26 23:34, Greg Kroah-Hartman wrote: > > > > #include "resource.h" > > > >=20 > > > > +#include "clk_mgr.h" > > > >=20 > > > > #include "include/irq_service_interface.h" > > > > #include "virtual/virtual_stream_encoder.h" > > > > #include "dce110/dce110_resource.h" > > > >=20 > > > > @@ -843,10 +844,17 @@ static bool dce100_validate_bandwidth( > > > >=20 > > > > { > > > > =20 > > > > int i; > > > > bool at_least_one_pipe =3D false; > > > >=20 > > > > + struct dc_stream_state *stream =3D NULL; > > > > + const uint32_t max_pix_clk_khz =3D > > > > max(dc->clk_mgr->clks.max_supported_dispclk_khz, 400000);> > >=20 > > > > for (i =3D 0; i < dc->res_pool->pipe_count; i++) { > > > >=20 > > > > - if (context->res_ctx.pipe_ctx[i].stream) > > > > + stream =3D context->res_ctx.pipe_ctx[i].stream; > > > > + if (stream) { > > > >=20 > > > > at_least_one_pipe =3D true; > > > >=20 > > > > + > > > > + if (stream->timing.pix_clk_100hz >=3D > > > > max_pix_clk_khz * 10) + return > > > > DC_FAIL_BANDWIDTH_VALIDATE; > > > > + } > > > >=20 > > > > } > > >=20 > > > This is a backport of commit: 118800b0797a ("drm/amd/display: Reject > > > modes with too high pixel clock on DCE6-10"). > > >=20 > > > The backport adds return DC_FAIL_BANDWIDTH_VALIDATE, in > > > validate_bandwidth functions that return bool; > > >=20 > > > drivers/gpu/drm/amd/display/dc/inc/core_status.h: > > > DC_FAIL_BANDWIDTH_VALIDATE =3D 13, /* BW and Watermark validation */ > > >=20 > > > In this branch DC_FAIL_BANDWIDTH_VALIDATE is integer 13, which conver= ts > > > to true, so the reject path is inverted into success. > > >=20 > > > So I think we need to fix this. Thoughts ? > >=20 > > Best to drop. >=20 > I'll drop this commit now, thanks! >=20 > greg k-h Hi All, If I understand correctly and the function returns bool in the old version,= =20 then the patch could be adjusted to use: return false; instead of: return DC_FAIL_BANDWIDTH_VALIDATE; then it will work and fix the issue that it was supposed to fix. Hope this helps, Timur