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Fri, 14 Aug 2026 03:57:49 -0700 (PDT) X-Received: by 2002:a05:6a21:2d4b:b0:3b2:a809:ffe with SMTP id adf61e73a8af0-3cc71a2d522mr6482065637.14.1786705069058; Fri, 14 Aug 2026 03:57:49 -0700 (PDT) Received: from [10.206.101.140] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-320ea2fcfb8sm3392781eec.21.2026.08.14.03.57.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Aug 2026 03:57:48 -0700 (PDT) Message-ID: <25b990fc-558d-d64b-1a5d-e593f4c8d649@oss.qualcomm.com> Date: Fri, 14 Aug 2026 16:27:40 +0530 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 2/4] arm64: dts: qcom: sc7280: Add dma-coherent property into venus node Content-Language: en-US To: Krzysztof Kozlowski Cc: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Mansur Alisha Shaik , Bjorn Andersson , Konrad Dybcio , Abhinav Kumar , Hans Verkuil , Stefan Schmidt , Hans Verkuil , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260801-iris-fixes-dma-pseq-fint-v1-0-aba0cb22f6ab@oss.qualcomm.com> <20260801-iris-fixes-dma-pseq-fint-v1-2-aba0cb22f6ab@oss.qualcomm.com> <20260813-frisky-augmented-crow-fd5d3d@quoll> <4b34e718-0878-25cc-a5bd-0d8858df5133@oss.qualcomm.com> <30195e14-0dcb-476d-af0d-f85ee57e2aa5@kernel.org> <26a880b2-5f37-43be-ae8b-2c0c27c777a1@kernel.org> From: Vishnu Reddy In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=I+dVgtgg c=1 sm=1 tr=0 ts=6a7ef4ae cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=axlFovWQs4n-uMMd4hsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: fau8irvo4IUG7m5qNZIkZ2V-4C6eLimr X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE0MDA4MyBTYWx0ZWRfXxru4QHA6X1LA lpVzbvqMNntecQhTpTknWTKRZ5jKoQgIO0kW3TZ1IfU6r++sAkE51bubltHAtSQMkB/Cnzproue z/f26G/yzdHB67WRU6On3bRbYAkQneNDmgU/8gnjVbI2uXw7UahDhdQ/JFiIdb+yF9hf8LldUYm HGBSsAx1TjJkizk9fJT9Rty4MRYY+r4DL+ri9nRqEWwTd0Q2G4TUMKEsyC7tvZSpi4yONDt4Tc9 VOAKDHnBs/DT1ew0Mm8b28xx35+Cra6OCv/JPQcw36XfjF1S4kXM9PzNXWTcsxu3UXqekFnsqhZ ULxKHFr5+AbQbrpCffjLf6KEJrVlKAWX/dmoParQyrcmmSDQeV9O18ZkBxyNRPLVHn1lw0gFRL2 lZh0vFjqasPF+odMPkqMGiqjPh1PcD4sRPIJaEdsgMYO9DaUhzFlh986ImbY/2KrECXhwPSoyYy imzCIIwXaaKyOqd6Ujg== X-Proofpoint-GUID: fau8irvo4IUG7m5qNZIkZ2V-4C6eLimr X-Proofpoint-Spam-Info: AW1haW4tMjYwODE0MDA4MyBTYWx0ZWRfXyqj5PsTiLpk0 SmkCQc7OuCaiVy6AddCqsA9R9ZIBkZOYTk/ma+OjACxt3nnVBqNPd9Dfbbp7/lcXo0Hw/ya7aR8 YB8Ag33pb9jLlVNndilwN/cMebWS14U= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-14_04,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608140083 On 8/14/2026 3:56 PM, Krzysztof Kozlowski wrote: > On 14/08/2026 12:24, Vishnu Reddy wrote: >> On 8/14/2026 3:26 PM, Krzysztof Kozlowski wrote: >>> On 14/08/2026 11:49, Vishnu Reddy wrote: >>>> On 8/14/2026 12:01 PM, Krzysztof Kozlowski wrote: >>>>> On 14/08/2026 07:29, Vishnu Reddy wrote: >>>>>> On 8/13/2026 2:49 PM, Krzysztof Kozlowski wrote: >>>>>>> On Sat, Aug 01, 2026 at 01:07:28PM +0530, Vishnu Reddy wrote: >>>>>>>> While testing with some higher resolution clips, the venus hardware >>>>>>>> triggers a fault due to wrong input data being received. Corruption >>>>>>>> was also observed in the captured output when the client dumped it >>>>>>>> to a file. >>>>>>>> >>>>>>>> On debugging, this was traced to the venus node not declaring >>>>>>>> dma-coherent. As a result, DMA buffers shared between the CPU and the >>>>>>>> venus video hardware/controller are not guaranteed to be I/O coherent: >>>>>>>> CPU writes to an input buffer can remain in CPU caches without being >>>>>>>> visible to the video hardware when it reads the same buffer, so the >>>>>>>> hardware receives input data that does not match what the CPU wrote. >>>>>>>> Likewise, on the capture path, data written by the video hardware to >>>>>>>> the output buffer may not be visible to the CPU, so the client reads >>>>>>>> stale or partial data, resulting in corruption. >>>>>>>> >>>>>>>> Add the dma-coherent property to the venus node so that DMA buffers >>>>>>>> shared between the CPU and the video hardware and controller remain >>>>>>>> coherent. >>>>>>>> >>>>>>>> Fixes: 37613aee2179 ("arm64: dts: qcom: sc7280: Add venus DT node") >>>>>>> Really does not look like a fix. How skipping a cache sync can fix >>>>>>> anything exactly? >>>>>> dma-coherent tells the kernel that this device DMA path is hardware-coherent, >>>>>> so the SMMU maps its buffers as cacheable. That attribute is what causes the >>>>>> coherent interconnect to snoop CPU cache lines on every VPU transaction, so >>>>>> hardware keeps CPU caches and VPU-visible memory in sync — which is why the >>>>>> dma-coherent property lets us skip the unnecessary cache clean/invalidate. >>>>> You just repeated what I wrote. What for? >>>>> >>>>>> If a device doesn't support I/O coherence, its buffers would instead be mapped >>>>>> non-cacheable, no snooping would occur, and the driver would need explicit >>>>>> dma_sync_*() calls at each transition. Venus on SC7280 does support I/O >>>>>> coherence, so dma-coherent describes that existing hardware capability to >>>>>> the DMA subsystem. >>>>> How does this anyhow explain your commit msg? Are you saying driver is >>>>> buggy that it misses sync calls? >>>> No, driver is not buggy here. dma-coherent flag is missed in the dt node. >>> Again, no... or explain why. Missing dma-coherent is not a fix, but >>> rather optimisation, but you claimed it is a fix. Explain why. >> Is the dma-coherent flag only for skipping cache sync? >> I might be repeating here — it enables the hardware level snoop between CPU >> caches and DMA memory. Without dma-coherent, the CPU cache and the memory >> which VPU accesses aren't in sync at the hardware level, which is what > They are in sync, because driver explicitly MUST sync it. No, currently driver is not calling the dma_sync*() explicitly. It won't be in sync. That's why dma-coherent flag added to keep the CPU cache and DMA memory in sync. Will you suggest to sync from the driver explicitly? If we call dma_sync*() in driver, will you recommend to add the dma-coherent flag or not in the dt node? > You cannot have uncoherent accesses without proper DMA cache syncing > operations. > >> caused the corruption. So dma-coherent is the proper fix here, and that's >> why I've mentioned it as a fix. Do you have any opinion on how you'd prefer >> to handle this? Please share. > As I told you, it is not a fix and provide arguments why. > > > Best regards, > Krzysztof >