From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Message-ID: <52726DE0.3060207@redhat.com> Date: Thu, 31 Oct 2013 15:49:04 +0100 From: Paolo Bonzini MIME-Version: 1.0 To: Gleb Natapov CC: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH] KVM: x86: emulate SAHF instruction References: <1383215382-10072-1-git-send-email-pbonzini@redhat.com> <20131031142119.GS4651@redhat.com> <527268E4.2070505@redhat.com> <20131031143405.GT4651@redhat.com> In-Reply-To: <20131031143405.GT4651@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: Il 31/10/2013 15:34, Gleb Natapov ha scritto: > I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64 > bit we should emulate it correctly. It says "The LAHF instruction can only be executed in 64-bit mode if supported by the processor implementation. Check the status of ECX bit 0 returned by CPUID function 8000_0001h to verify that the processor supports LAHF in 64-bit mode". Same as Intel---in fact 80000001h is an "AMD leaf" so to speak. I found "AMD introduced support for the instructions with their Athlon 64, Opteron and Turion 64 revision D processors in March 2005 and Intel introduced support for the instructions with the Pentium 4 G1 stepping in December 2005". I think we can for all practical purposes ignore the lahf_lm CPUID flag. > Who knows what code depends on it. > Of course I pretty much doubt we will ever emulate sahf in 64 bit mode Yep. Paolo