From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from down.free-electrons.com ([37.187.137.238]:36653 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753443AbbFQPYZ (ORCPT ); Wed, 17 Jun 2015 11:24:25 -0400 Message-ID: <55819127.1040306@free-electrons.com> Date: Wed, 17 Jun 2015 17:24:23 +0200 From: Gregory CLEMENT MIME-Version: 1.0 To: Thomas Petazzoni CC: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Tawfik Bayouk , Nadav Haklai , Lior Amsalem , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH 1/9] ARM: mvebu: fix suspend to RAM on big-endian configurations References: <1434456785-23696-1-git-send-email-thomas.petazzoni@free-electrons.com> <1434456785-23696-2-git-send-email-thomas.petazzoni@free-electrons.com> In-Reply-To: <1434456785-23696-2-git-send-email-thomas.petazzoni@free-electrons.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: Hi Thomas, On 16/06/2015 14:12, Thomas Petazzoni wrote: > The current Armada XP suspend to RAM implementation, as added in > commit 27432825ae19f ("ARM: mvebu: Armada XP GP specific > suspend/resume code") does not handle big-endian configurations > properly: the small bit of assembly code putting the DRAM in > self-refresh and toggling the GPIOs to turn off power forgets to > convert the values to little-endian. > > This commit fixes that by making sure the two values we will write to > the DRAM controller register and GPIO register are already in > little-endian before entering the critical assembly code. > > Signed-off-by: Thomas Petazzoni > Cc: # v3.19+ > Fixes: 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code") Acked-by: Gregory CLEMENT applied on mvebu/fixes Thanks, Gregory > --- > arch/arm/mach-mvebu/pm-board.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-mvebu/pm-board.c b/arch/arm/mach-mvebu/pm-board.c > index 6dfd4ab..301ab38 100644 > --- a/arch/arm/mach-mvebu/pm-board.c > +++ b/arch/arm/mach-mvebu/pm-board.c > @@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd) > for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) > ackcmd |= BIT(pic_raw_gpios[i]); > > + srcmd = cpu_to_le32(srcmd); > + ackcmd = cpu_to_le32(ackcmd); > + > /* > * Wait a while, the PIC needs quite a bit of time between the > * two GPIO commands. > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com