From: John Crispin <john@phrozen.org>
To: Paul Burton <paul.burton@imgtec.com>,
ralf@linux-mips.org, linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>,
stable@vger.kernel.org, linux-kernel@vger.kernel.org,
James Hogan <james.hogan@imgtec.com>
Subject: Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives
Date: Sat, 12 Sep 2015 08:13:07 +0200 [thread overview]
Message-ID: <55F3C273.3030704@phrozen.org> (raw)
In-Reply-To: <20150910180323.GA22682@NP-P-BURTON>
Hi Paul,
--> http://www.linux-mips.org/archives/linux-mips/2015-09/msg00057.html
John
On 10/09/2015 20:03, Paul Burton wrote:
> Ralf: is there a reason you've only applied patch 1 of this series?
>
> v4.2 is broken because these didn't get in (despite being submitted well
> before the release), and master is still broken because they still
> haven't gotten in. If there's a reason you didn't merge them please let
> me know, otherwise please can we get them in ASAP.
>
> Thanks,
> Paul
>
> On Wed, Aug 05, 2015 at 03:42:40PM -0700, Paul Burton wrote:
>> Commit 977e043d5ea1 ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level
>> with mips64r2") leads to .set mips64r2 directives being present in 32
>> bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64
>> instructions being emitted by the assembler when expanding
>> pseudo-instructions. For example the "move" instruction can legitimately
>> be expanded to a "daddu". This causes problems when the kernel is run on
>> a MIPS32 CPU, as CONFIG_32BIT kernels of course often are...
>>
>> Fix this by dropping the .set <ISA> directives entirely now that Kconfig
>> should be ensuring that kernels including this code are built with a
>> suitable -march= compiler flag.
>>
>> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
>> Cc: Markos Chandras <markos.chandras@imgtec.com>
>> Cc: <stable@vger.kernel.org> # 3.16+
>> ---
>>
>> arch/mips/kernel/cps-vec.S | 2 --
>> 1 file changed, 2 deletions(-)
>>
>> diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
>> index 209ded1..763d8b7 100644
>> --- a/arch/mips/kernel/cps-vec.S
>> +++ b/arch/mips/kernel/cps-vec.S
>> @@ -229,7 +229,6 @@ LEAF(mips_cps_core_init)
>> has_mt t0, 3f
>>
>> .set push
>> - .set mips64r2
>> .set mt
>>
>> /* Only allow 1 TC per VPE to execute... */
>> @@ -348,7 +347,6 @@ LEAF(mips_cps_boot_vpes)
>> nop
>>
>> .set push
>> - .set mips64r2
>> .set mt
>>
>> 1: /* Enter VPE configuration state */
>> --
>> 2.5.0
>>
>
next prev parent reply other threads:[~2015-09-12 6:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1438814560-19821-1-git-send-email-paul.burton@imgtec.com>
2015-08-05 22:42 ` [PATCH 1/6] MIPS: CPS: use 32b accesses to GCRs Paul Burton
2015-08-05 22:42 ` [PATCH 2/6] MIPS: CPS: stop dangling delay slot from has_mt Paul Burton
2015-08-05 22:42 ` [PATCH 3/6] MIPS: CPS: don't include MT code in non-MT kernels Paul Burton
2015-08-05 22:42 ` [PATCH 4/6] MIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than CONFIG_MIPS_MT Paul Burton
2015-08-05 22:42 ` [PATCH 5/6] MIPS: CONFIG_MIPS_MT_SMP should depend upon CPU_MIPSR2 Paul Burton
2015-09-12 10:16 ` Ralf Baechle
2015-09-12 15:11 ` Paul Burton
2015-11-03 13:23 ` Ralf Baechle
2015-08-05 22:42 ` [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives Paul Burton
2015-09-10 18:03 ` Paul Burton
2015-09-12 6:13 ` John Crispin [this message]
2015-09-12 15:14 ` Paul Burton
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