Re: Patches for arch/arm/mm/cache-l2x0.c

[Mason <slash.tmp@free.fr>]

[ Back-porting v4.2 patches to v4.1 LTS ]

On 26/11/2015 09:54, Mason wrote:

> Over the past few months, I wrote board-support code based on kernel v4.2
> and things worked as expected.
> 
> Then I had to rebase to a LTS kernel (I used v4.1.13) and something broke
> in the L2 cache setup. Apparently, Russell King did a lot of fixing and
> cleaning up between v4.1 and v4.2
> 
> I cherry-picked the following 5 patches, and my 4.1 kernel works again:
> 
> 346248a2d1e3a815297125c1347d90dafcc51990 ARM: l2c: avoid passing auxiliary control register through enable method
>  arch/arm/mm/cache-l2x0.c | 32 +++++++++++++++++---------------
>  1 file changed, 17 insertions(+), 15 deletions(-)
> dc63c0733050996143a82f2b095fc378a04274f0 ARM: l2c: only unlock caches if NS_LOCKDOWN bit is set
>  arch/arm/mm/cache-l2x0.c | 26 +++++++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
> 7787be2a74dc618bf32348a0f588eebf7ebe0a06 ARM: l2c: clean up l2c_configure()
>  arch/arm/mm/cache-l2x0.c | 23 ++++++++++++++---------
>  1 file changed, 14 insertions(+), 9 deletions(-)
> 8f80afa16002e9b4784dc1d51c48f95f52838cfb ARM: l2c: write auxiliary control register first
>  arch/arm/mm/cache-l2x0.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 9749167eec6a057122b7a1ab2193abd079645aba ARM: l2c: restore the behaviour documented above l2c_enable()
>  arch/arm/mm/cache-l2x0.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> 
> The problem is that my system runs Linux in NS (non-secure) mode, and there
> are a bunch of instructions that Linux can't use in that mode.
> 
> I suspect the crash comes from trying to unconditionally unlock the caches,
> thus patch dc63c0733050.
> 
> But 9749167eec6a and 8f80afa16002 also look like good candidates for
> back-porting to v4.1
> 
> What do you think?

Any opinion on this topic?

Regards.