From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-by2on0057.outbound.protection.outlook.com ([207.46.100.57]:47280 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750749AbcDTQkx (ORCPT ); Wed, 20 Apr 2016 12:40:53 -0400 Subject: Re: [PATCH] ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel To: Sascha Hauer References: <1461159271-3764-1-git-send-email-s.hauer@pengutronix.de> CC: , , From: Dinh Nguyen Message-ID: <5717ABE4.5010906@opensource.altera.com> Date: Wed, 20 Apr 2016 11:18:44 -0500 MIME-Version: 1.0 In-Reply-To: <1461159271-3764-1-git-send-email-s.hauer@pengutronix.de> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: On 04/20/2016 08:34 AM, Sascha Hauer wrote: > The secondary CPU starts up in ARM mode. When the kernel is compiled in > thumb2 mode we have to explicitly compile the secondary startup > trampoline in ARM mode, otherwise the CPU will go to Nirvana. > > Signed-off-by: Sascha Hauer > Reported-by: Steffen Trumtrar > Suggested-by: Ard Biesheuvel > Cc: stable@vger.kernel.org > --- > arch/arm/mach-socfpga/headsmp.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S > index 5d94b7a..c160fa3 100644 > --- a/arch/arm/mach-socfpga/headsmp.S > +++ b/arch/arm/mach-socfpga/headsmp.S > @@ -13,6 +13,7 @@ > #include > > .arch armv7-a > + .arm > > ENTRY(secondary_trampoline) > /* CPU1 will always fetch from 0x0 when it is brought out of reset. > Applied! Thanks, Dinh