[PATCH] arm64: dts: fsl-lx2160a: define pinctrl for iic2 sd-cd/-wp functions

[PATCH] arm64: dts: fsl-lx2160a: define pinctrl for iic2 sd-cd/-wp functions

[Josua Mayer]

LX2160 SoC uses a densely packed configuration area in memory for pin
muxing - configuring a variable number of IOs at a time.

Since pinctrl nodes were added for the i2c signals of LX2160 SoC, boot
errors have been observed on SolidRun LX2162A Clearfog board when rootfs
is located on SD-Card (esdhc0):

[    1.961035] mmc0: new ultra high speed SDR104 SDHC card at address aaaa
...
[    5.220655] i2c i2c-1: using pinctrl states for GPIO recovery
[    5.226425] i2c i2c-1: using generic GPIOs for recovery
...
[    5.440471] mmc0: card aaaa removed

The card-detect and write-protect signals of esdhc0 are an alternate
function of IIC2 (in dts i2c1 - on lx2162 clearfog status disabled).

By use of u-boot "md", and linux "devmem" command it was confirmed that
RCWSR12 (at 0x01e0012c) with IIC2_PMUX (at bits 0-2) changes from
0x08000006 to 0x0000000 after starting Linux.
This means that the card-detect pin function has changed to i2c function
- which will cause the controller to detect card removal.

The respective i2c1-scl-pins node is only linked to i2c1 node that has
status disabled in device-tree for the solidrun boards.
How the memory is changed has not been investigated.

As a workaround add a new pinctrl definition for the
card-detect/write-protect function of IIC2 pins.
It seems unwise to link this directly from the SoC dtsi as boards may
rely on other functions such as flextimer.

Instead add the pinctrl to each board's esdhc0 node if it is known to
rely on native card-detect function. These boards have esdhc0 node
enabled and do not define broken-cd property:

- fsl-lx2160a-bluebox3.dts
- fsl-lx2160a-clearfog-itx.dtsi
- fsl-lx2160a-qds.dts
- fsl-lx2160a-rdb.dts
- fsl-lx2160a-tqmlx2160a-mblx2160a.dts
- fsl-lx2162a-clearfog.dts
- fsl-lx2162a-qds.dts

This was tested on the SolidRun LX2162 Clearfog with Linux v6.12.33.

Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to 
support bus recovery")
Cc: stable@vger.kernel.org
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
  arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts             | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi        | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts                  | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts                  | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi                     | 4 
++++
  arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts             | 2 ++
  arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts                  | 2 ++
  8 files changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
index 042c486bdda2..298fcdce6c6b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
@@ -152,6 +152,8 @@ &esdhc0 {
  	sd-uhs-sdr50;
  	sd-uhs-sdr25;
  	sd-uhs-sdr12;
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git 
a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
index a7dcbecc1f41..67ffe2e1b0bc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
@@ -93,6 +93,8 @@ &esdhc0 {
  	sd-uhs-sdr50;
  	sd-uhs-sdr25;
  	sd-uhs-sdr12;
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 4d721197d837..17fe4a8fd35e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -214,6 +214,8 @@ &emdio2 {
  };
   &esdhc0 {
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 0c44b3cbef77..faa486d6a5b1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -131,6 +131,8 @@ &esdhc0 {
  	sd-uhs-sdr50;
  	sd-uhs-sdr25;
  	sd-uhs-sdr12;
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git 
a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
index f6a4f8d54301..4ba55feb18b2 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
@@ -177,6 +177,8 @@ &esdhc0 {
  	no-sdio;
  	wp-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
  	cd-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&i2c1_scl_gpio>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index c9541403bcd8..555a191b0bb4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1717,6 +1717,10 @@ i2c1_scl_gpio: i2c1-scl-gpio-pins {
  				pinctrl-single,bits = <0x0 0x1 0x7>;
  			};
  +			i2c1_sdhc_cdwp: i2c1-esdhc0-cd-wp-pins {
+				pinctrl-single,bits = <0x0 0x6 0x7>;
+			};
+
  			i2c2_scl: i2c2-scl-pins {
  				pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
  			};
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
index eafef8718a0f..4b58105c3ffa 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
@@ -227,6 +227,8 @@ &esdhc0 {
  	sd-uhs-sdr50;
  	sd-uhs-sdr25;
  	sd-uhs-sdr12;
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };
  diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
index 9f5ff1ffe7d5..caa079df35f6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
@@ -238,6 +238,8 @@ &esdhc0 {
  	sd-uhs-sdr50;
  	sd-uhs-sdr25;
  	sd-uhs-sdr12;
+	pinctrl-0 = <&i2c1_sdhc_cdwp>;
+	pinctrl-names = "default";
  	status = "okay";
  };

---
base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494
change-id: 20250710-lx2160-sd-cd-00bf38ae169e

Best regards,
-- 
Josua Mayer <josua@solid-run.com>

Re: [PATCH] arm64: dts: fsl-lx2160a: define pinctrl for iic2 sd-cd/-wp functions

[Josua Mayer]

On 10/07/2025 18:09, Josua Mayer wrote:
> LX2160 SoC uses a densely packed configuration area in memory for pin
> muxing - configuring a variable number of IOs at a time.
>
> Since pinctrl nodes were added for the i2c signals of LX2160 SoC, boot
> errors have been observed on SolidRun LX2162A Clearfog board when rootfs
> is located on SD-Card (esdhc0):
>
> [    1.961035] mmc0: new ultra high speed SDR104 SDHC card at address aaaa
> ...
> [    5.220655] i2c i2c-1: using pinctrl states for GPIO recovery
> [    5.226425] i2c i2c-1: using generic GPIOs for recovery
> ...
> [    5.440471] mmc0: card aaaa removed
>
> The card-detect and write-protect signals of esdhc0 are an alternate
> function of IIC2 (in dts i2c1 - on lx2162 clearfog status disabled).
>
> By use of u-boot "md", and linux "devmem" command it was confirmed that
> RCWSR12 (at 0x01e0012c) with IIC2_PMUX (at bits 0-2) changes from
> 0x08000006 to 0x0000000 after starting Linux.

compared values at 0x01e0012c (read-only) and 0x70010012c (dcfg).

> This means that the card-detect pin function has changed to i2c function
> - which will cause the controller to detect card removal.
>
> The respective i2c1-scl-pins node is only linked to i2c1 node that has
> status disabled in device-tree for the solidrun boards.
> How the memory is changed has not been investigated.

RCWSR12 at 0x01e0012c is read-only and reflects the initial boot-time
setting from RCW stage. The pinctrl-single driver uses dynamic
configuration area at 0x70010012c to overide boot-time values.

We found that the dynamic configuration address reads 0 before first
write, hence when applying the first configuration the original non-zero
value is lost.

It might be worth reviewing and defining pinctrl for all alternate functions
of each i2c controller.

> As a workaround add a new pinctrl definition for the
> card-detect/write-protect function of IIC2 pins.
> It seems unwise to link this directly from the SoC dtsi as boards may
> rely on other functions such as flextimer.
>
> Instead add the pinctrl to each board's esdhc0 node if it is known to
> rely on native card-detect function. These boards have esdhc0 node
> enabled and do not define broken-cd property:
>
> - fsl-lx2160a-bluebox3.dts
> - fsl-lx2160a-clearfog-itx.dtsi
> - fsl-lx2160a-qds.dts
> - fsl-lx2160a-rdb.dts
> - fsl-lx2160a-tqmlx2160a-mblx2160a.dts
> - fsl-lx2162a-clearfog.dts
> - fsl-lx2162a-qds.dts
>
> This was tested on the SolidRun LX2162 Clearfog with Linux v6.12.33.
>
> Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to
> support bus recovery")
> Cc: stable@vger.kernel.org
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
>    arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts             | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi        | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts                  | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts                  | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi                     | 4
> ++++
>    arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts             | 2 ++
>    arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts                  | 2 ++
>    8 files changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
> index 042c486bdda2..298fcdce6c6b 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
> @@ -152,6 +152,8 @@ &esdhc0 {
>    	sd-uhs-sdr50;
>    	sd-uhs-sdr25;
>    	sd-uhs-sdr12;
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git
> a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
> index a7dcbecc1f41..67ffe2e1b0bc 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
> @@ -93,6 +93,8 @@ &esdhc0 {
>    	sd-uhs-sdr50;
>    	sd-uhs-sdr25;
>    	sd-uhs-sdr12;
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 4d721197d837..17fe4a8fd35e 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -214,6 +214,8 @@ &emdio2 {
>    };
>     &esdhc0 {
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 0c44b3cbef77..faa486d6a5b1 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -131,6 +131,8 @@ &esdhc0 {
>    	sd-uhs-sdr50;
>    	sd-uhs-sdr25;
>    	sd-uhs-sdr12;
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git
> a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
> index f6a4f8d54301..4ba55feb18b2 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts
> @@ -177,6 +177,8 @@ &esdhc0 {
>    	no-sdio;
>    	wp-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
>    	cd-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
> +	pinctrl-0 = <&i2c1_scl_gpio>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index c9541403bcd8..555a191b0bb4 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -1717,6 +1717,10 @@ i2c1_scl_gpio: i2c1-scl-gpio-pins {
>    				pinctrl-single,bits = <0x0 0x1 0x7>;
>    			};
>    +			i2c1_sdhc_cdwp: i2c1-esdhc0-cd-wp-pins {
> +				pinctrl-single,bits = <0x0 0x6 0x7>;
> +			};
> +
>    			i2c2_scl: i2c2-scl-pins {
>    				pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
>    			};
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
> index eafef8718a0f..4b58105c3ffa 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
> @@ -227,6 +227,8 @@ &esdhc0 {
>    	sd-uhs-sdr50;
>    	sd-uhs-sdr25;
>    	sd-uhs-sdr12;
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>    diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> index 9f5ff1ffe7d5..caa079df35f6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts
> @@ -238,6 +238,8 @@ &esdhc0 {
>    	sd-uhs-sdr50;
>    	sd-uhs-sdr25;
>    	sd-uhs-sdr12;
> +	pinctrl-0 = <&i2c1_sdhc_cdwp>;
> +	pinctrl-names = "default";
>    	status = "okay";
>    };
>
> ---
> base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494
> change-id: 20250710-lx2160-sd-cd-00bf38ae169e
>
> Best regards,

Re: [PATCH] arm64: dts: fsl-lx2160a: define pinctrl for iic2 sd-cd/-wp functions

[Josua Mayer]

On 13/07/2025 11:24, Josua Mayer wrote:
> On 10/07/2025 18:09, Josua Mayer wrote:
>> LX2160 SoC uses a densely packed configuration area in memory for pin
>> muxing - configuring a variable number of IOs at a time.
>>
>> Since pinctrl nodes were added for the i2c signals of LX2160 SoC, boot
>> errors have been observed on SolidRun LX2162A Clearfog board when rootfs
>> is located on SD-Card (esdhc0):
>>
>> [    1.961035] mmc0: new ultra high speed SDR104 SDHC card at address 
>> aaaa
>> ...
>> [    5.220655] i2c i2c-1: using pinctrl states for GPIO recovery
>> [    5.226425] i2c i2c-1: using generic GPIOs for recovery
>> ...
>> [    5.440471] mmc0: card aaaa removed
>>
>> The card-detect and write-protect signals of esdhc0 are an alternate
>> function of IIC2 (in dts i2c1 - on lx2162 clearfog status disabled).
>>
>> By use of u-boot "md", and linux "devmem" command it was confirmed that
>> RCWSR12 (at 0x01e0012c) with IIC2_PMUX (at bits 0-2) changes from
>> 0x08000006 to 0x0000000 after starting Linux.
>
> compared values at 0x01e0012c (read-only) and 0x70010012c (dcfg).
>
>> This means that the card-detect pin function has changed to i2c function
>> - which will cause the controller to detect card removal.
>>
>> The respective i2c1-scl-pins node is only linked to i2c1 node that has
>> status disabled in device-tree for the solidrun boards.
>> How the memory is changed has not been investigated.
>
> RCWSR12 at 0x01e0012c is read-only and reflects the initial boot-time
> setting from RCW stage. The pinctrl-single driver uses dynamic
> configuration area at 0x70010012c to overide boot-time values.
>
> We found that the dynamic configuration address reads 0 before first
> write, hence when applying the first configuration the original non-zero
> value is lost.
>
> It might be worth reviewing and defining pinctrl for all alternate 
> functions
> of each i2c controller.
>
>> As a workaround add a new pinctrl definition for the
>> card-detect/write-protect function of IIC2 pins.
>> It seems unwise to link this directly from the SoC dtsi as boards may
>> rely on other functions such as flextimer.

After further thought I believe it better to revert the offending commit.
Any board that has status okay on either i2c[1-5] might have unintended
state on multiple pins since 8a1365c7bbc1.

On LX2162A Clearfog alone, the change broke both SD Card-Detect (IIC2_PMUX)
and SFP connector LEDs (SDHC1_DIR_PMUX).
However it is possible to also break IRQs, CAN, SPI and GPIOs - see 
below just
what the first 32-bit word at offset 12c controls:

08000006             = 0b0000100000000000 0000000000000110
IIC2_PMUX                  |||   |||   || |   |||   |||XXX : I2C/GPIO/CD-WP
IIC3_PMUX                  |||   |||   || |   |||   XXX    : 
I2C/GPIO/CAN/EVT
IIC4_PMUX                  |||   |||   || |   |||XXX       : 
I2C/GPIO/CAN/EVT
IIC5_PMUX                  |||   |||   || |   XXX          : 
I2C/GPIO/SDHC-CLK
IIC6_PMUX                  |||   |||   || |XXX             : 
I2C/GPIO/SDHC-CLK
XSPI1_A_DATA74_PMUX        |||   |||   XX X                : XSPI/GPIO
XSPI1_A_DATA30_PMUX        |||   |||XXX                    : XSPI/GPIO
XSPI1_A_BASE_PMUX          |||   XXX                       : XSPI/GPIO
SDHC1_BASE_PMUX            |||XXX                          : SDHC/GPIO/SPI
SDHC1_DIR_PMUX             XXX                             : SDHC/GPIO/SPI
RESERVED                 XX

 From QorIQ LX2160A Reference Manual Section 4.9.8.9
"Reset Control Word (RCW) Register Descriptions".

>>
>> Instead add the pinctrl to each board's esdhc0 node if it is known to
>> rely on native card-detect function. These boards have esdhc0 node
>> enabled and do not define broken-cd property:
>>
>> - fsl-lx2160a-bluebox3.dts
>> - fsl-lx2160a-clearfog-itx.dtsi
>> - fsl-lx2160a-qds.dts
>> - fsl-lx2160a-rdb.dts
>> - fsl-lx2160a-tqmlx2160a-mblx2160a.dts
>> - fsl-lx2162a-clearfog.dts
>> - fsl-lx2162a-qds.dts
>>
>> This was tested on the SolidRun LX2162 Clearfog with Linux v6.12.33.
>>
>> Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to
>> support bus recovery")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>> ---
>> arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts | 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 
>> 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 4
>> ++++
>> arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts | 2 ++
>> arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 2 ++
>>    8 files changed, 18 insertions(+)