From: Hari Bathini <hbathini@linux.ibm.com>
To: adubey@linux.ibm.com, bpf@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, maddy@linux.ibm.com,
ast@kernel.org, andrii@kernel.org, daniel@iogearbox.net,
shuah@kernel.org, linux-kselftest@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH v3 1/5] powerpc/bpf: fix alignment of long branch trampoline address
Date: Tue, 28 Apr 2026 20:59:39 +0530 [thread overview]
Message-ID: <7d3bbb94-575f-4119-9ef0-62cff98795ce@linux.ibm.com> (raw)
In-Reply-To: <20260411221413.44304-2-adubey@linux.ibm.com>
On 12/04/26 3:44 am, adubey@linux.ibm.com wrote:
> From: Abhishek Dubey <adubey@linux.ibm.com>
>
> Ensure the dummy trampoline address field present between the OOL stub
> and the long branch stub is 8-byte aligned, for memory compatibility
> when content loaded to a register.
>
> Reported-by: Hari Bathini <hbathini@linux.ibm.com>
> Fixes: d243b62b7bd3 ("powerpc64/bpf: Add support for bpf trampolines")
> Cc: stable@vger.kernel.org
> Signed-off-by: Abhishek Dubey <adubey@linux.ibm.com>
> ---
> arch/powerpc/net/bpf_jit.h | 4 ++--
> arch/powerpc/net/bpf_jit_comp.c | 34 ++++++++++++++++++++++++++-----
> arch/powerpc/net/bpf_jit_comp64.c | 4 ++--
> 3 files changed, 33 insertions(+), 9 deletions(-)
>
> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
> index 7354e1d72f79..1184ad15d5a4 100644
> --- a/arch/powerpc/net/bpf_jit.h
> +++ b/arch/powerpc/net/bpf_jit.h
> @@ -208,8 +208,8 @@ int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *
> int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx,
> u32 *addrs, int pass, bool extra_pass);
> void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx);
> -void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx);
> -void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx);
> +void bpf_jit_build_epilogue(u32 *image, u32 *fimage, struct codegen_context *ctx);
> +void bpf_jit_build_fentry_stubs(u32 *image, u32 *fimage, struct codegen_context *ctx);
> void bpf_jit_realloc_regs(struct codegen_context *ctx);
> int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr);
>
> diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
> index a62a9a92b7b5..c255b30a37b0 100644
> --- a/arch/powerpc/net/bpf_jit_comp.c
> +++ b/arch/powerpc/net/bpf_jit_comp.c
> @@ -49,11 +49,34 @@ asm (
> " .popsection ;"
> );
>
> -void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx)
> +void bpf_jit_build_fentry_stubs(u32 *image, u32 *fimage, struct codegen_context *ctx)
> {
> int ool_stub_idx, long_branch_stub_idx;
>
> /*
> + * In the final pass, align the mis-aligned dummy_tramp_addr field
> + * in the fimage. The alignment NOP must appear before OOL stub,
> + * to make ool_stub_idx & long_branch_stub_idx constant from end.
> + *
> + * Need alignment NOP in following conditions:
> + *
I don't think I follow this table..
> + * OOL stub aligned CONFIG_PPC_FTRACE_OUT_OF_LINE Alignment NOP
> + * Y Y N
> + * Y N Y
Please help me understand why a NOP is needed here
> + * N Y Y
> + * N N N
and also, why a NOP isn't needed here..
- Hari
next prev parent reply other threads:[~2026-04-28 15:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-11 22:14 [PATCH v3 0/5] powerpc/bpf: Add support for verifier selftest adubey
2026-04-11 22:14 ` [PATCH v3 1/5] powerpc/bpf: fix alignment of long branch trampoline address adubey
2026-04-28 15:29 ` Hari Bathini [this message]
2026-04-11 22:14 ` [PATCH v3 2/5] powerpc/bpf: Move out dummy_tramp_addr after Long branch stub adubey
2026-04-11 22:14 ` [PATCH v3 3/5] selftest/bpf: Fixing powerpc JIT disassembly failure adubey
2026-04-11 22:14 ` [PATCH v3 4/5] selftest/bpf: Enable verifier selftest for powerpc64 adubey
2026-04-11 22:14 ` [PATCH v3 5/5] selftest/bpf: Add tailcall " adubey
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