Re: [PATCH] drm/amd/display: Fix flip-done timeouts on mode1 reset

[Mario Limonciello <superm1@kernel.org>]

On 7/23/26 14:47, Leo Li wrote:
> 
> 
> On 2026-07-23 15:18, Mario Limonciello wrote:
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
>>> index 05d6915f9a6b0..079d4ccc88da6 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
>>> @@ -287,10 +287,19 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)
>>>         * is enabled. On DCE, vupdate is only needed in VRR mode.
>>>         */
>>>        if (amdgpu_ip_version(adev, DCE_HWIP, 0) != 0) {
>>> -        rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, enable);
>>> +        if (enable) {
>>> +            rc = amdgpu_irq_get(adev, &adev->vupdate_irq, irq_type);
>>> +            drm_dbg_vbl(crtc->dev, "Get vupdate_irq ret=%d\n", rc);
>>> +        } else {
>>> +            rc = amdgpu_irq_put(adev, &adev->vupdate_irq, irq_type);
>>> +            drm_dbg_vbl(crtc->dev, "Put vupdate_irq ret=%d\n", rc);
>>> +        }
>>
>> For completeness in error handling, shouldn't you pass up the return code on non-zero?  It looks like it could pass up to DRM core then.
> 
> It's not shown in the context here, but the rc is passed up later:
> https://elixir.bootlin.com/linux/v7.2-rc4/source/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c#L295
> 
> - Leo
> 
Ah got it, thanks.  No concerns.

Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>

>>
>>>        } else if (dc_supports_vrr(dm->dc->ctx->dce_version)) {
>>>            if (enable) {
>>> -            /* vblank irq on -> Only need vupdate irq in vrr mode */
>>> +            /* vblank irq on -> Only need vupdate irq in vrr mode
>>> +             * Not ref-counted since we need explicit enable/disable
>>> +             * for DCE VRR handling
>>> +             */
>>>                if (amdgpu_dm_crtc_vrr_active(acrtc_state))
>>>                    rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);
>>>            } else {
>