From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1ECD6166F1A; Sun, 16 Mar 2025 10:33:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742121194; cv=none; b=tUvXTq8jyePyFl2tI5D/Xwvhl6TIxyYFvNSRNugAHg0U5YYdPpIHeHRQuGqvsz91bNhYwxMxNIptCv5ASoUuT+6tCN/SNfsWTcQQhaG9IOm5cOfqEz5oX6BlTeppShHJO7M3JjDBuBGaIPN0HQkgoRM8Ox1PFtjh9iF+Cnt1wsY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742121194; c=relaxed/simple; bh=SRVlez7jQA05YlqVbFTK28O6hKORV/BZnhg/jFT8c7g=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=MqePlIUzWri8jpBVadcljQfIidbwIgOqs6XhnEE3X3DYDADjZfxBwlL4V495sH/vZ3Jrk1ALDnSLumtM77a7aN3YInjWvB4nVwi3k/gCMAWHF0iWFREye9OVYxhzoFp8aRcPWPk9T5t6cKHEuZStJ27ZsXf1bqu/xQgIyEaX1YM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QAjwDU6f; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QAjwDU6f" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7FF78C4CEDD; Sun, 16 Mar 2025 10:33:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742121193; bh=SRVlez7jQA05YlqVbFTK28O6hKORV/BZnhg/jFT8c7g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=QAjwDU6f+Pa8HwEv4iSGndES2e7YvkrvUPjECcMnxGLRfemdcbYv33UH6njk8aNWu Q22BWB7QzwY+MT5F62iLC5npSimS5BmHFlGi1N1cgJ/M4/b1wP6RxpYLY+ggHj0gng NI8SnFlCi0q3553EzmMmEzQmrderUuQLl6DhvwxjdOXbKNTLvMmAhUdIsENCeQizgZ 1xy6FC0JFThMMOws0YL2ZFFua7qRQjZYT5HYTNjU94IJNCusokvsP4dQpgCW8jF8GM hp/uN3wLEglgXOrUefpouKEsSz5Bh0SywVC3fl7yTw4eGBmiIv6iV08D0ZpsvvL3C0 uxA46e3hKlQBA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1ttlIt-00Dy3A-3n; Sun, 16 Mar 2025 10:33:11 +0000 Date: Sun, 16 Mar 2025 10:33:10 +0000 Message-ID: <86a59lnu3d.wl-maz@kernel.org> From: Marc Zyngier To: Akihiko Odaki Cc: Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Andrew Jones , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, devel@daynix.com, stable@vger.kernel.org Subject: Re: [PATCH v5 0/5] KVM: arm64: PMU: Fix SET_ONE_REG for vPMC regs In-Reply-To: <20250315-pmc-v5-0-ecee87dab216@daynix.com> References: <20250315-pmc-v5-0-ecee87dab216@daynix.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: akihiko.odaki@daynix.com, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, andrew.jones@linux.dev, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, devel@daynix.com, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sat, 15 Mar 2025 09:12:09 +0000, Akihiko Odaki wrote: > > Prepare vPMC registers for user-initiated changes after first run. This > is important specifically for debugging Windows on QEMU with GDB; QEMU > tries to write back all visible registers when resuming the VM execution > with GDB, corrupting the PMU state. Windows always uses the PMU so this > can cause adverse effects on that particular OS. > > This series also contains patch "KVM: arm64: PMU: Set raw values from > user to PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}", which reverts semantic > changes made for the mentioned registers in the past. It is necessary > to migrate the PMU state properly on Firecracker, QEMU, and crosvm. > > Signed-off-by: Akihiko Odaki > --- > Changes in v5: > - Rebased. > - Link to v4: https://lore.kernel.org/r/20250313-pmc-v4-0-2c976827118c@daynix.com > > Changes in v4: > - Reverted changes for functions implementing ioctls in patch > "KVM: arm64: PMU: Assume PMU presence in pmu-emul.c". > - Removed kvm_pmu_vcpu_reset(). > - Reordered function calls in kvm_vcpu_reload_pmu() for better style. > - Link to v3: https://lore.kernel.org/r/20250312-pmc-v3-0-0411cab5dc3d@daynix.com > > Changes in v3: > - Added patch "KVM: arm64: PMU: Assume PMU presence in pmu-emul.c". > - Added an explanation of this path series' motivation to each patch. > - Explained why userspace register writes and register reset should be > covered in patch "KVM: arm64: PMU: Reload when user modifies > registers". > - Marked patch "KVM: arm64: PMU: Set raw values from user to > PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}" for stable. > - Reoreded so that patch "KVM: arm64: PMU: Set raw values from user to > PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}" would come first. > - Added patch "KVM: arm64: PMU: Call kvm_pmu_handle_pmcr() after masking > PMCNTENSET_EL0". > - Added patch "KVM: arm64: Reload PMCNTENSET_EL0". > - Link to v2: https://lore.kernel.org/r/20250307-pmc-v2-0-6c3375a5f1e4@daynix.com > > Changes in v2: > - Changed to utilize KVM_REQ_RELOAD_PMU as suggested by Oliver Upton. > - Added patch "KVM: arm64: PMU: Reload when user modifies registers" > to cover more registers. > - Added patch "KVM: arm64: PMU: Set raw values from user to > PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}". > - Link to v1: https://lore.kernel.org/r/20250302-pmc-v1-1-caff989093dc@daynix.com > > --- > Akihiko Odaki (5): > KVM: arm64: PMU: Set raw values from user to PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR} > KVM: arm64: PMU: Assume PMU presence in pmu-emul.c > KVM: arm64: PMU: Fix SET_ONE_REG for vPMC regs > KVM: arm64: PMU: Reload when user modifies registers > KVM: arm64: PMU: Reload when resetting > > arch/arm64/kvm/arm.c | 17 ++++++++----- > arch/arm64/kvm/emulate-nested.c | 6 +++-- > arch/arm64/kvm/pmu-emul.c | 56 +++++++++++------------------------------ > arch/arm64/kvm/reset.c | 3 --- > arch/arm64/kvm/sys_regs.c | 52 ++++++++++++++++++++++---------------- > include/kvm/arm_pmu.h | 4 +-- > 6 files changed, 62 insertions(+), 76 deletions(-) Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.