From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 026B643DA24; Tue, 10 Mar 2026 09:43:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773135800; cv=none; b=u1VejUksE6Bfc4qOi44j4PE1bCfXPtbp6ygl5ORFrzlzUYUIaZI5Gg1vFgdmf1MbS4MS6WlmiQ0J8jUJShsww8ds8KFVeBJWboTXxqJEj3v0yp7Hf4KrC20hrRKixlBm01uWYV8HE3xEgqp+AbBokU9By30mksYMFsup7w+DenU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773135800; c=relaxed/simple; bh=rX6EbNTfCAw+gMJvCUFXy5h+IdLeSvGG0MpJALk0dUs=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=GmkaXd8HX/DZ06mVNhzdTfIfvEdapTvb7dClR8Pz/2DdKwBGerzLiRTQ1XDXUNH6YQiAoBSa+tfTLDS2yPG8aDQt7aOqrzh2LL1ihIqXZ7zYG+/JE/VA4bWj2RpylTKENjVSJN+vDscIkQJBkXy86o803PRsGNEuLRYlyZhTnVQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aqS4ux+P; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aqS4ux+P" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7ADC1C19423; Tue, 10 Mar 2026 09:43:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773135799; bh=rX6EbNTfCAw+gMJvCUFXy5h+IdLeSvGG0MpJALk0dUs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=aqS4ux+Pcv/CBNuEfLqERLr/KQ0IHVo9pvV26zmwml+mMYwPQuSrW+POsk4d2sUP8 cxh9m4NDTlGjS4aotA7D22HuKpWQm2BGJzDpPpI//cqHxQU7phgNnf1K6g7oEDrXNc va9JiA+Ks8Gi5cqLO1wu3jV+/MAsbcV7I4Rzxun+5+LznOIZdkVmux1Lb3GkuDIrNE C9/kgMGwF6AXhJafX1IVQMilAeYa2dZNfT8zkw9xGdnYy6uorVLvRLzIrMVusi4dhV zTjlfzZ9DsT2BbO1NR5Lo6OYOy8gL4veDPkS43CZ75RuYonNK5yttxa83huWvH9Wf0 T9kzwXme6kN3g== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vztcT-00000000N6v-2Ea1; Tue, 10 Mar 2026 09:43:17 +0000 Date: Tue, 10 Mar 2026 09:43:17 +0000 Message-ID: <86cy1c6mve.wl-maz@kernel.org> From: Marc Zyngier To: Suzuki K Poulose Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Joey Gouly , Oliver Upton , Zenghui Yu , Will Deacon , Catalin Marinas , Quentin Perret , Fuad Tabba , Vincent Donnefort , stable@vger.kernel.org Subject: Re: [PATCH] KVM: arm64: pkvm: Don't reprobe for ICH_VTR_EL2.TDS on CPU hotplug In-Reply-To: <5a5afd0a-de2d-4697-a5ba-0e470ddb20f2@arm.com> References: <20260310085433.3936742-1-maz@kernel.org> <5a5afd0a-de2d-4697-a5ba-0e470ddb20f2@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: suzuki.poulose@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, joey.gouly@arm.com, oupton@kernel.org, yuzenghui@huawei.com, will@kernel.org, catalin.marinas@arm.com, qperret@google.com, tabba@google.com, vdonnefort@google.com, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 10 Mar 2026 09:17:43 +0000, Suzuki K Poulose wrote: > > On 10/03/2026 08:54, Marc Zyngier wrote: > > Hotplugging a CPU off and back on fails with pKVM, as we try to > > probe for ICH_VTR_EL2.TDS. In a non-VHE setup, this is achieved > > by using an EL2 stub helper. However, the stubs are out of reach > > once pKVM has deprivileged the kernel. The CPU never boots. > > > > Since pKVM doesn't allow late onlining of CPUs, we can detect > > that protected mode is enforced early on, and return the current > > state of the capability. > > > > Fixes: 2a28810cbb8b2 ("KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping") > > Reported-by: Vincent Donnefort > > Signed-off-by: Marc Zyngier > > Cc: stable@vger.kernel.org > > --- > > arch/arm64/kernel/cpufeature.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index c31f8e17732a3..947ff71b3b66b 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -2345,6 +2345,9 @@ static bool can_trap_icv_dir_el1(const struct arm64_cpu_capabilities *entry, > > !is_midr_in_range_list(has_vgic_v3)) > > return false; > > + if (system_capabilities_finalized() && > > is_protected_kvm_enabled()) > > + return cpus_have_final_cap(ARM64_HAS_ICH_HCR_EL2_TDIR); > > Is it a worth adding a comment here ? Otherwise this looks very odd - > Returning the system state of a capability for a "hotplugged" CPU. How about this? diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 947ff71b3b66b..32c2dbcc0c641 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2345,6 +2345,12 @@ static bool can_trap_icv_dir_el1(const struct arm64_cpu_capabilities *entry, !is_midr_in_range_list(has_vgic_v3)) return false; + /* + * pKVM prevents late onlining of CPUs. This means that whatever + * state the capability is in after deprivilege cannot be affected + * by a new CPU booting -- this is garanteed to be a CPU we have + * already seen, and the cap is therefore unchanged. + */ if (system_capabilities_finalized() && is_protected_kvm_enabled()) return cpus_have_final_cap(ARM64_HAS_ICH_HCR_EL2_TDIR); > > Otherwise > > Reviewed-by: Suzuki K Poulose Thanks! M. -- Without deviation from the norm, progress is not possible.