Re: [PATCH] KVM: arm64: nv: Respect HA when computing translated TCR

[Marc Zyngier <maz@kernel.org>]

On Thu, 29 Oct 2026 10:05:19 +0000,
Fuad Tabba <fuad.tabba@linux.dev> wrote:
> 
> Hi Oliver,
> 
> On Thu, 29 Oct 2026 09:05:22 +0000, Oliver Upton <oupton@kernel.org> wrote:
> [...]
> > diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
> [...]
> > @@ -29,7 +29,8 @@ static inline u64 translate_tcr_el2_to_tcr_el1(u64 tcr)
> >                (tcr & TCR_EL2_TG0_MASK) |
> >                (tcr & TCR_EL2_ORGN0_MASK) |
> >                (tcr & TCR_EL2_IRGN0_MASK) |
> > -              (tcr & TCR_EL2_T0SZ_MASK);
> > +              (tcr & TCR_EL2_T0SZ_MASK) |
> > +              ((tcr & TCR_EL2_HA) ? TCR_HA : 0);
> >  }
> 
> Should you forward SH0 in this patch as well? It's missing here, so
> the walks are Non-shareable, and looking at the ARM ARM, this would
> make every hardware Access flag update CONSTRAINED UNPREDICTABLE
> (R_WLTNL, and the IsWBShareable() check in AArch64_S1Translate()). An
> L1 that programmed SH0 as Inner Shareable could then take an
> unsupported atomic update fault.

That's a good point. However, my reading of the ARM ARM indicates that
as long as S2 shareability is Inner-Shareable, the resulting
shareability is Inner-Shareable (see R_ZNLRJ), so we're actually safe.
This should be fixed though.

> HPD isn't forwarded either, although at.c reads it from TCR_EL2 for an
> E2H=0 guest. Was that intentional?

Another bug (E2H==0 really doesn't see much love). This needs fixing,
but also relies on sanitising TCR_EL2. Thankfully, there is [1] which
requires some reviewing... ;-)

Thanks,

	M.

[1] https://lore.kernel.org/r/20260917214215.74135-1-weilin.chang@arm.com

-- 
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