From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7EC6C433E0 for ; Tue, 16 Mar 2021 13:53:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76EE765053 for ; Tue, 16 Mar 2021 13:53:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235108AbhCPNwi (ORCPT ); Tue, 16 Mar 2021 09:52:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:56306 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235543AbhCPNwI (ORCPT ); Tue, 16 Mar 2021 09:52:08 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BFBBE6502B; Tue, 16 Mar 2021 13:52:07 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lMA7B-001yh1-LE; Tue, 16 Mar 2021 13:52:05 +0000 Date: Tue, 16 Mar 2021 13:52:05 +0000 Message-ID: <877dm7fbp6.wl-maz@kernel.org> From: Marc Zyngier To: Vladimir Murzin Cc: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, dbrazdil@google.com Subject: Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers In-Reply-To: <20210316134319.89472-1-vladimir.murzin@arm.com> References: <20210316134319.89472-1-vladimir.murzin@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: vladimir.murzin@arm.com, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, dbrazdil@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Tue, 16 Mar 2021 13:43:19 +0000, Vladimir Murzin wrote: > > Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") > reorganized el2 setup in such way that virtual cpu id registers set > only in nVHE, yet they used (and need) to be set irrespective VHE > support. > > Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") > Signed-off-by: Vladimir Murzin Reviewed-by: Marc Zyngier Thanks, M. -- Without deviation from the norm, progress is not possible.