From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E40C5DF29; Wed, 6 Mar 2024 10:00:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709719203; cv=none; b=otz1LCRYp6+O6EvzGpzRmtUIAzI2LsSGDWSWhgFo6TZ7sE1BL/TH2QzuRbHWhbemQJ9NouOchHy4BT+EgK/TtBGpYp1g+Dpo70nfUcIgsMUzU9n8RDdgNTVZlAEk7kvhUwA9flKpJ+qR+8/vfVX+6pn6u8Ej/aohBGp20ID7MBE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709719203; c=relaxed/simple; bh=i4/4QrpJfHFNXJZarfGFvLLrG901WJW0hZMDBQXduhM=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Auy0IVR5oWWj89s1DKdQ5i34ogJ2RuE3gVXYE57vbOFRxT1/yeYtZ5uasY2poLylpYgSyDlznpi755Ave9UlwS2e14NSAuDXIwPXSMu+R4HDL++UrFAKei0KWpRQwtKLf4LI/WrXYuzHXhrXSUHgjT9iGS3ZPLXVNZD3F71s5bs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CTQzxWRq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CTQzxWRq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE852C433F1; Wed, 6 Mar 2024 10:00:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709719202; bh=i4/4QrpJfHFNXJZarfGFvLLrG901WJW0hZMDBQXduhM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=CTQzxWRqpbjpJWqbgq43IPovJFKAa9pwbfzREiSxHWpbmJYBIMecE+xiQzZjXI7hV up1JXO4iBHcodx4vM6dP2zUjLl1shtuPe0RD40V/wg9UgdXczqY+6wB4y9tjIP8AnG nsJkJ2SnZcqlwzMG/F2K16ZkC1e61V/LRdiT0ioNfId/nVbYsaQyhM4+n5Si7r1RbV 2lp5fIuZdun/CxSLZ347OUtePFAwCKPG/yqLRtAFvNIt76rUG8cR7ETt1vnuKf1Itg qO5LvvwH+6gcC6Ki64IMPUKZZA2wVLuVTV/D8f8H+3ClcCYE8FpzXdlkAhCaeAysr+ Igxx5XvP5Nflw== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rho47-009t3x-TN; Wed, 06 Mar 2024 10:00:00 +0000 Date: Wed, 06 Mar 2024 09:59:57 +0000 Message-ID: <87bk7rr882.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, James Morse , Suzuki K Poulose , Zenghui Yu , Will Deacon , stable@vger.kernel.org Subject: Re: [PATCH 2/3] KVM: arm64: Fix host-programmed guest events in nVHE In-Reply-To: <20240305184840.636212-3-oliver.upton@linux.dev> References: <20240305184840.636212-1-oliver.upton@linux.dev> <20240305184840.636212-3-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, will@kernel.org, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 05 Mar 2024 18:48:39 +0000, Oliver Upton wrote: > > Programming PMU events in the host that count during guest execution is > a feature supported by perf, e.g. > > perf stat -e cpu_cycles:G ./lkvm run > > While this works for VHE, the guest/host event bitmaps are not carried > through to the hypervisor in the nVHE configuration. Make > kvm_pmu_update_vcpu_events() conditional on whether or not _hardware_ > supports PMUv3 rather than if the vCPU as vPMU enabled. > > Cc: stable@vger.kernel.org > Fixes: 84d751a019a9 ("KVM: arm64: Pass pmu events to hyp via vcpu") > Signed-off-by: Oliver Upton > --- > include/kvm/arm_pmu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h > index 4b9d8fb393a8..df32355e3e38 100644 > --- a/include/kvm/arm_pmu.h > +++ b/include/kvm/arm_pmu.h > @@ -86,7 +86,7 @@ void kvm_vcpu_pmu_resync_el0(void); > */ > #define kvm_pmu_update_vcpu_events(vcpu) \ > do { \ > - if (!has_vhe() && kvm_vcpu_has_pmu(vcpu)) \ > + if (!has_vhe() && kvm_arm_support_pmu_v3()) \ > vcpu->arch.pmu.events = *kvm_get_pmu_events(); \ > } while (0) > Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.