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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH 09/11] drm/i915/skl: Prevent unclaimed register writes on skylake.
Date: Mon, 02 Nov 2015 10:01:03 +0200	[thread overview]
Message-ID: <87egg8q18g.fsf@intel.com> (raw)
In-Reply-To: <87vb9yuii6.fsf@intel.com>

On Fri, 23 Oct 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Thu, 22 Oct 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
>> On Thu, Oct 22, 2015 at 01:56:34PM +0200, Maarten Lankhorst wrote:
>>> I'm getting unclaimed register writes when checking the WM registers
>>> after the crtc is disabled. So I would imagine those are guarded by
>>> the crtc power well. Fix this by not reading out wm state when the
>>> power well is off.
>>> 
>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
>>> Cc: stable@vger.kernel.org
>>
>> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>>
>> Jani, one for you.
>
> This one pushed to drm-intel-fixes, thanks for the patch and review.
>
> I dropped cc: stable because this will still make it to v4.3, and we're
> not backporting SKL fixes beyond that.

This didn't make it to v4.3 after all. Dropped from drm-intel-fixes,
pushed to drm-intel-next-fixes, and marked cc: stable for v4.3.

BR,
Jani.


>
> BR,
> Jani.
>
>
>> -Daniel
>>
>>> ---
>>>  drivers/gpu/drm/i915/intel_pm.c | 5 +++++
>>>  1 file changed, 5 insertions(+)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>>> index 4c1c1bb96a9e..fbc10331055e 100644
>>> --- a/drivers/gpu/drm/i915/intel_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>>> @@ -2833,7 +2833,12 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
>>>  	int plane;
>>>  	u32 val;
>>>  
>>> +	memset(ddb, 0, sizeof(*ddb));
>>> +
>>>  	for_each_pipe(dev_priv, pipe) {
>>> +		if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PIPE(pipe)))
>>> +			continue;
>>> +
>>>  		for_each_plane(dev_priv, pipe, plane) {
>>>  			val = I915_READ(PLANE_BUF_CFG(pipe, plane));
>>>  			skl_ddb_entry_init_from_hw(&ddb->plane[pipe][plane],
>>> -- 
>>> 2.1.0
>>> 
>>> _______________________________________________
>>> Intel-gfx mailing list
>>> Intel-gfx@lists.freedesktop.org
>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center

  reply	other threads:[~2015-11-02  7:57 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1445514996-18733-1-git-send-email-maarten.lankhorst@linux.intel.com>
2015-10-22 11:56 ` [PATCH 09/11] drm/i915/skl: Prevent unclaimed register writes on skylake Maarten Lankhorst
2015-10-22 13:11   ` [Intel-gfx] " Daniel Vetter
2015-10-23  7:54     ` Jani Nikula
2015-11-02  8:01       ` Jani Nikula [this message]
2015-10-22 11:56 ` [PATCH 10/11] drm/i915/skl: Update watermarks before the crtc is disabled Maarten Lankhorst
2015-10-22 13:15   ` [Intel-gfx] " Daniel Vetter

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