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charset=US-ASCII On Fri, 31 Jul 2026 17:45:32 -0700, Sasha Levin wrote: > Hi Sasha, I have backported this entire series to linux-6.18.y here: https://lore.kernel.org/stable/20260803232608.3276045-1-ashutosh.dixit@intel.com/ Thanks. -- Ashutosh > From: Ashutosh Dixit > > [ Upstream commit ed455775c5a68b75e5f6ad6c8e0e3e9c98fd3f64 ] > > Minor refactor of OAG MMIO trigger register whitelisting for code reuse > with OAM MMIO trigger register whitelisting. > > Signed-off-by: Ashutosh Dixit > Reviewed-by: Umesh Nerlige Ramappa > Link: https://patch.msgid.link/20251202025115.373546-5-ashutosh.dixit@intel.com > Stable-dep-of: e70086a3a06d ("drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists") > Signed-off-by: Sasha Levin > --- > drivers/gpu/drm/xe/xe_reg_whitelist.c | 41 +++++++++++++-------------- > 1 file changed, 19 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c > index 9f4b56808a27..b9ddbad12a58 100644 > --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c > +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c > @@ -66,28 +66,6 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { > ENGINE_CLASS(RENDER)), > XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0)) > }, > - { XE_RTP_NAME("oa_reg_render"), > - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > - ENGINE_CLASS(RENDER)), > - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, > - RING_FORCE_TO_NONPRIV_ACCESS_RW), > - WHITELIST(OAG_OASTATUS, > - RING_FORCE_TO_NONPRIV_ACCESS_RD), > - WHITELIST(OAG_OAHEADPTR, > - RING_FORCE_TO_NONPRIV_ACCESS_RD | > - RING_FORCE_TO_NONPRIV_RANGE_4)) > - }, > - { XE_RTP_NAME("oa_reg_compute"), > - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > - ENGINE_CLASS(COMPUTE)), > - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, > - RING_FORCE_TO_NONPRIV_ACCESS_RW), > - WHITELIST(OAG_OASTATUS, > - RING_FORCE_TO_NONPRIV_ACCESS_RD), > - WHITELIST(OAG_OAHEADPTR, > - RING_FORCE_TO_NONPRIV_ACCESS_RD | > - RING_FORCE_TO_NONPRIV_RANGE_4)) > - }, > { XE_RTP_NAME("14024997852"), > XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)), > XE_RTP_ACTIONS(WHITELIST(FF_MODE, > @@ -95,6 +73,25 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { > WHITELIST(VFLSKPD, > RING_FORCE_TO_NONPRIV_ACCESS_RW)) > }, > + > +#define WHITELIST_OA_MMIO_TRG(trg, status, head) \ > + WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ > + WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ > + WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) > + > +#define WHITELIST_OAG_MMIO_TRG \ > + WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) > + > + { XE_RTP_NAME("oag_mmio_trg_rcs"), > + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > + ENGINE_CLASS(RENDER)), > + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) > + }, > + { XE_RTP_NAME("oag_mmio_trg_ccs"), > + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > + ENGINE_CLASS(COMPUTE)), > + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) > + }, > }; > > static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > -- > 2.53.0 >