From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AFE0C43381 for ; Wed, 13 Mar 2019 16:39:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6010320854 for ; Wed, 13 Mar 2019 16:39:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725856AbfCMQjn (ORCPT ); Wed, 13 Mar 2019 12:39:43 -0400 Received: from relay8-d.mail.gandi.net ([217.70.183.201]:36963 "EHLO relay8-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726074AbfCMQjn (ORCPT ); Wed, 13 Mar 2019 12:39:43 -0400 X-Originating-IP: 109.213.209.9 Received: from localhost (alyon-652-1-66-9.w109-213.abo.wanadoo.fr [109.213.209.9]) (Authenticated sender: gregory.clement@bootlin.com) by relay8-d.mail.gandi.net (Postfix) with ESMTPSA id 2E0391BF21B; Wed, 13 Mar 2019 16:39:36 +0000 (UTC) From: Gregory CLEMENT To: Viresh Kumar Cc: "Rafael J. Wysocki" , linux-pm@vger.kernel.org, Christian Neubert , Ilias Apalodimas , Vincent Guittot , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?utf-8?Q?Miqu=C3=A8l?= Raynal , Maxime Chevallier , stable@vger.kernel.org Subject: Re: [PATCH 1/2] cpufreq: armada-37xx: fix clock parenting In-Reply-To: <20190311053130.qrobxd2wn75nrgbf@vireshk-i7> References: <20190308164710.10597-1-gregory.clement@bootlin.com> <20190308164710.10597-2-gregory.clement@bootlin.com> <20190311053130.qrobxd2wn75nrgbf@vireshk-i7> Date: Wed, 13 Mar 2019 17:39:36 +0100 Message-ID: <87pnquvid3.fsf@FE-laptop> MIME-Version: 1.0 Content-Type: text/plain Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Hi Viresh, On lun., mars 11 2019, Viresh Kumar wrote: > On 08-03-19, 17:47, Gregory CLEMENT wrote: [...] >> parent = clk_get_parent(clk); >> + >> + /* >> + * Unset parent clock to force the clock framework setting again >> + * the clock parent >> + */ >> + clk_set_parent(clk, NULL); >> + >> + /* >> + * For the Armada 37xx CPU clocks, setting the parent will >> + * actually configure the parent when DVFS is enabled. At >> + * hardware level it will be a different register from the one >> + * read when doing clk_get_parent that will be set with >> + * clk_set_parent. >> + */ >> clk_set_parent(clk, parent); >> } > > Maybe this should be done right from the clock driver instead? As cpufreq may or > maynot be enabled by default (Surely most of the people will always enable it, > but I am just trying to find the right place for doing this). The way we are > setting the clock parent isn't that great, and looks a bit hacky just because of > the way clock framework is. Maybe doing it directly, without getting clock > framework in between, from the clock driver may look sane ? I've just sent a patch following your suggestion to the clock mailing but keeping you in CC too. Gregory > > -- > viresh -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com