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Fri, 23 Oct 2026 08:31:32 -0700 (PDT) Received: from localhost ([155.117.96.35]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ea947ac357sm1667205ad.76.2026.10.23.08.31.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 08:31:32 -0700 (PDT) X-Mailing-List: stable@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 23 Oct 2026 23:31:26 +0800 Message-Id: To: "slack up" , "Anup Patel" , "Atish Patra" , "Paul Walmsley" , "Palmer Dabbelt" , "Albert Ou" , "Alexandre Ghiti" , "Andy Chiu" , "Yong-Xuan Wang" Cc: , , , , , "linux-riscv" Subject: Re: [PATCH] RISC-V: KVM: Fix builds without CONFIG_RISCV_ISA_V From: "Ze Huang" X-Mailer: aerc 0.22.0.r35.g0a434803 References: In-Reply-To: X-Proofpoint-ORIG-GUID: zX2N_xmS_xuAC7IEO5xTj-WOumQ6MAMi X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDA2MCBTYWx0ZWRfX/s55WCVXzMZ6 CmaEh5qwnAjQtHWX9qX6+XCH+Sp3XYOLmLGzr5yT0ZV1tf/vHLETuoS1Xgfd9/5VRzfH6gWk/KT Q1E9rvwClzkB+2BJydUNRfIsGmbbADGdfnQsjN8wjwCIlZVspm0mJVkFDylNsvZiMOZ/Zo8Mnpc 37rGdi7fMmKBrjwNb3jEjgfNZppbnWLu8PbXnccbRZHmlZbXhf/vPhz4MIRQyqKkWRqLvyj0upO KV9P/fUyjai0d2BgR1HDSDTKHcqtL7mp40kNiQTYYbPUSmaD6G5MOwJMrpsJhDXQ/PCVWmGbZA8 +VD2fhtbFnJQAU4Sjd8eFdbla5+b6R20ZtkurSDWmCOVtUg7YvxAi+zJR7Ifw2xm/+CuR3ooANy O00vzWe/5kCDsmFrODDvSlyvbYOZAvz7EfBZowtrmoK20S1zsxaH6sqZDQPFAIOxKt85kL0Fr39 MjPVOFFsveFnTYMWFNA== X-Proofpoint-GUID: zX2N_xmS_xuAC7IEO5xTj-WOumQ6MAMi X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDA2MCBTYWx0ZWRfXwUdcg6xahA7y jc2r2o7yh6QwuJ4E4C7UlG6jv0NMWdelS6Or9SgjLBplsUnqzEBsk2ftFmQh4RtdxAuhhyuJD8C strcPrk668iVMe8EpcpWYqrpdzRALYI= X-Authority-Analysis: v=2.4 cv=UaHE26SN c=1 sm=1 tr=0 ts=6adb7dd6 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ilsi1XWDFcrB9FjxRIUvHg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=UqCG9HQmAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=B-Qh9SJ9cMKcPyFv0BMA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 bulkscore=0 clxscore=1011 spamscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230060 On Thu Oct 22, 2026 at 1:31 AM CST, slack up wrote: > From: Xiaochun Yu > > Commit b5060a4aa33d ("RISC-V: KVM: fix vcpu vector context > handling for kernel-mode vector") made the KVM vCPU load and put paths > call get_cpu_vector_context() and put_cpu_vector_context() > unconditionally. It also added an unconditional call to > __kvm_riscv_vector_restore() on the guest entry path. > > The no-op definitions of the first two helpers live in , > but includes that header only when > CONFIG_RISCV_ISA_V is enabled. The KVM header also does not provide a > no-op __kvm_riscv_vector_restore() in its disabled branch. As a result, > a KVM build without CONFIG_RISCV_ISA_V fails with missing helper > declarations. > > Include unconditionally to reuse its existing no-op > helpers, and provide the missing KVM restore stub when Vector support is > disabled. This does not change the Vector-enabled path. > > Fixes: b5060a4aa33d ("RISC-V: KVM: fix vcpu vector context handling for k= ernel-mode vector") > Cc: stable@vger.kernel.org > Signed-off-by: Xiaochun Yu > --- > This single patch fixes a build regression when KVM is enabled without th= e > RISC-V Vector extension. > > Tested on base a804c5742bff (Torvalds master): > > - CONFIG_RISCV_ISA_V=3Dn, CONFIG_KVM=3Dm: full Image modules build passed= . > - CONFIG_RISCV_ISA_V=3Dy, CONFIG_KVM=3Dm: vcpu.o and vcpu_vector.o rebuil= t. Tested-by: Ze Huang Tested on commit a804c5742bff with gcc 16.2.1 and clang 23.1.3: CONFIG_RISCV_ISA_V=3Dn, CONFIG_KVM=3Dm: full Image + modules build passes (before the patch: 3 implicit-declaration errors with gcc, 5 with clang) > --- > arch/riscv/include/asm/kvm_vcpu_vector.h | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/kvm_vcpu_vector.h b/arch/riscv/includ= e/asm/kvm_vcpu_vector.h > index 6371d5ea5392..ebc619ed67dd 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_vector.h > +++ b/arch/riscv/include/asm/kvm_vcpu_vector.h > @@ -11,9 +11,9 @@ > #define __KVM_VCPU_RISCV_VECTOR_H > =20 > #include > +#include > =20 > #ifdef CONFIG_RISCV_ISA_V > -#include > #include > =20 > static __always_inline void __kvm_riscv_vector_save(struct kvm_cpu_conte= xt *context) > @@ -55,6 +55,10 @@ static inline void kvm_riscv_v_exit(void) > =20 > struct kvm_cpu_context; > =20 > +static inline void __kvm_riscv_vector_restore(struct kvm_cpu_context *co= ntext) > +{ > +} > + > static inline void kvm_riscv_vcpu_vector_reset(struct kvm_vcpu *vcpu) > { > } > > --- > base-commit: a804c5742bff224d4cb4d25dd383554d598be32b > change-id: 20261021-ospp-c1-b4-submit-e22dc09faf5a > > Best regards,