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From: Gregory Price <gregory.price@memverge.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-cxl@vger.kernel.org, David Hildenbrand <david@redhat.com>,
	Kees Cook <keescook@chromium.org>,
	stable@vger.kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Michal Hocko <mhocko@suse.com>,
	linux-mm@kvack.org, linux-acpi@vger.kernel.org
Subject: Re: [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default
Date: Tue, 14 Feb 2023 14:01:23 -0500	[thread overview]
Message-ID: <Y+vag3hg3VRNRUti@memverge.com> (raw)
In-Reply-To: <63ebd56e639e9_32d61294f4@dwillia2-xfh.jf.intel.com.notmuch>

On Tue, Feb 14, 2023 at 10:39:42AM -0800, Dan Williams wrote:
> Gregory Price wrote:
> > On Sun, Feb 05, 2023 at 05:02:29PM -0800, Dan Williams wrote:
> > > Summary:
> > > --------
> > > 
> > > CXL RAM support allows for the dynamic provisioning of new CXL RAM
> > > regions, and more routinely, assembling a region from an existing
> > > configuration established by platform-firmware. The latter is motivated
> > > by CXL memory RAS (Reliability, Availability and Serviceability)
> > > support, that requires associating device events with System Physical
> > > Address ranges and vice versa.
> > > 
> > 
> > Ok, I simplified down my tests and reverted a bunch of stuff, figured i
> > should report this before I dive further in.
> > 
> > Earlier i was carrying the DOE patches and others, I've dropped most of
> > that to make sure i could replicate on the base kernel and qemu images
> > 
> > QEMU branch: 
> > https://gitlab.com/jic23/qemu/-/tree/cxl-2023-01-26
> > this is a little out of date at this point i think? but it shouldn't
> > matter, the results are the same regardless of what else i pull in.
> > 
> > Kernel branch:
> > https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=for-6.3/cxl-ram-region
> 
> Note that I acted on this feedback from Greg to break out a fix and
> merge it for v6.2-final
> 
> http://lore.kernel.org/r/Y+CSOeHVLKudN0A6@kroah.com
> 
> ...i.e. you are missing at least the passthrough decoder fix, but that
> would show up as a region creation failure not a QEMU crash.
> 
> So I would move to testing cxl/next.
> 

I just noticed this, already spinning a new kernel.  Will report back

> Not ruling out the driver yet, but Fan's tests with hardware has me
> leaning more towards QEMU.

Same, not much has changed and I haven't tested with hardware yet. Was
planning to install it on our local boxes sometime later this week.

Was just so close to setting up a virtual memory pool in the lab, was
getting antsy :]

  reply	other threads:[~2023-02-14 19:01 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20230208173730uscas1p2af3a9eeb8946dfa607b190c079a49653@uscas1p2.samsung.com>
2023-02-06  1:02 ` [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Dan Williams
2023-02-06  1:03   ` [PATCH 10/18] cxl/region: Fix passthrough-decoder detection Dan Williams
2023-02-06  5:38     ` Greg KH
2023-02-06 17:22       ` Dan Williams
2023-02-07  0:00     ` Dave Jiang
2023-02-08 12:44     ` Jonathan Cameron
2023-02-09 20:28     ` Verma, Vishal L
2023-02-06  5:36   ` [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Gregory Price
2023-02-06 16:40     ` Davidlohr Bueso
2023-02-06 18:23       ` Dan Williams
2023-02-06 17:29     ` Dan Williams
2023-02-06 17:18       ` Davidlohr Bueso
2023-02-08 17:37   ` Fan Ni
2023-02-09  4:56     ` Dan Williams
2023-02-13 12:13   ` David Hildenbrand
2023-02-14 18:45     ` Dan Williams
2023-02-14 18:27   ` Gregory Price
2023-02-14 18:39     ` Dan Williams
2023-02-14 19:01       ` Gregory Price [this message]
2023-02-14 21:18         ` Jonathan Cameron
2023-02-14 21:51           ` Gregory Price
2023-02-14 21:54             ` Gregory Price
2023-02-15 10:03               ` Jonathan Cameron
2023-02-18  9:47                 ` Gregory Price

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