From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8A91C433E6 for ; Thu, 18 Mar 2021 12:57:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3A8964F59 for ; Thu, 18 Mar 2021 12:57:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231137AbhCRM5V (ORCPT ); Thu, 18 Mar 2021 08:57:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:55394 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231288AbhCRM5C (ORCPT ); Thu, 18 Mar 2021 08:57:02 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id C892464E28; Thu, 18 Mar 2021 12:57:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1616072222; bh=QM1fCH9+yvE1msPa2fUjwKePuiAxlHmW2l1xQy/WFqc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=OPwlrSaIcEpUkAMbAGSntvmHL6qLaPXpOw/TEnMZApdmFurbtBjSqn3xeWfiQgWTy v1LXKWuKD7lUeFLThyxsXw6Sjke2/kkJ+ODDAFOi9kZtF+amXwVV87GJ6FSyTE499G lUbNeUcMYzltvYkwyYNkFHNaYhKO2lNgJ0kqiGAEJuRWNqK1SksqCzNvKtxA03Y0AB bHf2NxWjpIhPImyOqoQ8TPD6pJmHfwuP7WivR6QlrdMSkaxoCLisc9AS8tuCyB9Xwc Z/V8bG7nY0e8G3Wt+jy2UWw3eFay2xBBh5ChVCir1j+37kUiId/PWKupOHZSkv+zVZ 0gn8tags78KSg== Date: Thu, 18 Mar 2021 08:57:00 -0400 From: Sasha Levin To: Will Deacon Cc: Vladimir Murzin , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, maz@kernel.org, dbrazdil@google.com Subject: Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers Message-ID: References: <20210316134319.89472-1-vladimir.murzin@arm.com> <20210317132614.GB5225@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20210317132614.GB5225@willie-the-truck> Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Wed, Mar 17, 2021 at 01:26:15PM +0000, Will Deacon wrote: >On Tue, Mar 16, 2021 at 01:43:19PM +0000, Vladimir Murzin wrote: >> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> reorganized el2 setup in such way that virtual cpu id registers set >> only in nVHE, yet they used (and need) to be set irrespective VHE >> support. >> >> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> Signed-off-by: Vladimir Murzin >> --- >> Changelog >> >> v1 -> v2 >> - Drop the reference to 32bit guests from commit message (per Marc) >> >> There is no upstream fix since issue went away due to code there has >> been reworked in 5.12: nVHE comes first, so virtual cpu id register >> are always set. >> >> Maintainers, please, Ack. >> >> arch/arm64/include/asm/el2_setup.h | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) > >Acked-by: Will Deacon > >It's a bit weird to have a patch in stable that isn't upstream, but I don't >see a better option here. Yes, I'd agree here - the commits that would need to be backported look way too invasive. I've queued it up, thanks. -- Thanks, Sasha