[PATCH 05/19] iommu/vt-d: Global devTLB flush when present context entry changed

[PATCH 05/19] iommu/vt-d: Global devTLB flush when present context entry changed

[Kun(llfl)]

From: Sanjay Kumar <sanjay.k.kumar@intel.com>

ANBZ: #1105

commit 37764b952e1b39053defc7ebe5dcd8c4e3e78de9 upstream.

This fixes a bug in context cache clear operation. The code was not
following the correct invalidation flow. A global device TLB invalidation
should be added after the IOTLB invalidation. At the same time, it
uses the domain ID from the context entry. But in scalable mode, the
domain ID is in PASID table entry, not context entry.

Fixes: 7373a8cc38197 ("iommu/vt-d: Setup context and enable RID2PASID support")
Cc: stable@vger.kernel.org # v5.0+
Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Kun(llfl) <llfl@linux.alibaba.com>
---
 drivers/iommu/intel/iommu.c | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index a5160d350f91..1a0027da6dad 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -2527,10 +2527,11 @@ static inline int domain_pfn_mapping(struct dmar_domain *domain, unsigned long i
 	return domain_mapping(domain, iov_pfn, NULL, phys_pfn, nr_pages, prot);
 }
 
-static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn)
+static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 devfn)
 {
-	unsigned long flags;
+	struct intel_iommu *iommu = info->iommu;
 	struct context_entry *context;
+	unsigned long flags;
 	u16 did_old;
 
 	if (!iommu)
@@ -2542,7 +2543,16 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn
 		spin_unlock_irqrestore(&iommu->lock, flags);
 		return;
 	}
-	did_old = context_domain_id(context);
+
+	if (sm_supported(iommu)) {
+		if (hw_pass_through && domain_type_is_si(info->domain))
+			did_old = FLPT_DEFAULT_DID;
+		else
+			did_old = info->domain->iommu_did[iommu->seq_id];
+	} else {
+		did_old = context_domain_id(context);
+	}
+
 	context_clear_entry(context);
 	__iommu_flush_cache(iommu, context, sizeof(*context));
 	spin_unlock_irqrestore(&iommu->lock, flags);
@@ -2560,6 +2570,8 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn
 				 0,
 				 0,
 				 DMA_TLB_DSI_FLUSH);
+
+	__iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH);
 }
 
 static inline void unlink_domain_info(struct device_domain_info *info)
@@ -5079,9 +5091,9 @@ int __init intel_iommu_init(void)
 
 static int domain_context_clear_one_cb(struct pci_dev *pdev, u16 alias, void *opaque)
 {
-	struct intel_iommu *iommu = opaque;
+	struct device_domain_info *info = opaque;
 
-	domain_context_clear_one(iommu, PCI_BUS_NUM(alias), alias & 0xff);
+	domain_context_clear_one(info, PCI_BUS_NUM(alias), alias & 0xff);
 	return 0;
 }
 
@@ -5091,12 +5103,13 @@ static int domain_context_clear_one_cb(struct pci_dev *pdev, u16 alias, void *op
  * devices, unbinding the driver from any one of them will possibly leave
  * the others unable to operate.
  */
-static void domain_context_clear(struct intel_iommu *iommu, struct device *dev)
+static void domain_context_clear(struct device_domain_info *info)
 {
-	if (!iommu || !dev || !dev_is_pci(dev))
+	if (!info->iommu || !info->dev || !dev_is_pci(info->dev))
 		return;
 
-	pci_for_each_dma_alias(to_pci_dev(dev), &domain_context_clear_one_cb, iommu);
+	pci_for_each_dma_alias(to_pci_dev(info->dev),
+			       &domain_context_clear_one_cb, info);
 }
 
 static void __dmar_remove_one_dev_info(struct device_domain_info *info)
@@ -5120,7 +5133,7 @@ static void __dmar_remove_one_dev_info(struct device_domain_info *info)
 
 		iommu_disable_dev_iotlb(info);
 		if (!dev_is_real_dma_subdevice(info->dev))
-			domain_context_clear(iommu, info->dev);
+			domain_context_clear(info);
 		intel_pasid_free_table(info->dev);
 	}
 
-- 
2.32.0 (Apple Git-132)

[PATCH 06/19] iommu/vt-d: Fix clearing real DMA device's scalable-mode context entries

[Kun(llfl)]

From: Lu Baolu <baolu.lu@linux.intel.com>

ANBZ: #1105

commit 474dd1c6506411752a9b2f2233eec11f1733a099 upstream.

The commit 2b0140c69637e ("iommu/vt-d: Use pci_real_dma_dev() for mapping")
fixes an issue of "sub-device is removed where the context entry is cleared
for all aliases". But this commit didn't consider the PASID entry and PASID
table in VT-d scalable mode. This fix increases the coverage of scalable
mode.

Suggested-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
Fixes: 8038bdb855331 ("iommu/vt-d: Only clear real DMA device's context entries")
Fixes: 2b0140c69637e ("iommu/vt-d: Use pci_real_dma_dev() for mapping")
Cc: stable@vger.kernel.org # v5.6+
Cc: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Kun(llfl) <llfl@linux.alibaba.com>
---
 drivers/iommu/intel/iommu.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 1a0027da6dad..34e498619210 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5126,14 +5126,13 @@ static void __dmar_remove_one_dev_info(struct device_domain_info *info)
 	iommu = info->iommu;
 	domain = info->domain;
 
-	if (info->dev) {
+	if (info->dev && !dev_is_real_dma_subdevice(info->dev)) {
 		if (dev_is_pci(info->dev) && sm_supported(iommu))
 			intel_pasid_tear_down_entry(iommu, info->dev,
 					PASID_RID2PASID, false);
 
 		iommu_disable_dev_iotlb(info);
-		if (!dev_is_real_dma_subdevice(info->dev))
-			domain_context_clear(info);
+		domain_context_clear(info);
 		intel_pasid_free_table(info->dev);
 	}
 
-- 
2.32.0 (Apple Git-132)

Re: [PATCH 05/19] iommu/vt-d: Global devTLB flush when present context entry changed

[Greg KH]

On Fri, May 06, 2022 at 08:00:43PM +0800, Kun(llfl) wrote:
> From: Sanjay Kumar <sanjay.k.kumar@intel.com>
> 
> ANBZ: #1105

What is this?

> commit 37764b952e1b39053defc7ebe5dcd8c4e3e78de9 upstream.
> 
> This fixes a bug in context cache clear operation. The code was not
> following the correct invalidation flow. A global device TLB invalidation
> should be added after the IOTLB invalidation. At the same time, it
> uses the domain ID from the context entry. But in scalable mode, the
> domain ID is in PASID table entry, not context entry.
> 
> Fixes: 7373a8cc38197 ("iommu/vt-d: Setup context and enable RID2PASID support")
> Cc: stable@vger.kernel.org # v5.0+

Is this a 5.10 backport for us to pick up?  What about 5.4?

thanks,

greg k-h

Re: [PATCH 06/19] iommu/vt-d: Fix clearing real DMA device's scalable-mode context entries

[Greg KH]

On Fri, May 06, 2022 at 08:00:44PM +0800, Kun(llfl) wrote:
> From: Lu Baolu <baolu.lu@linux.intel.com>
> 
> ANBZ: #1105
> 
> commit 474dd1c6506411752a9b2f2233eec11f1733a099 upstream.
> 
> The commit 2b0140c69637e ("iommu/vt-d: Use pci_real_dma_dev() for mapping")
> fixes an issue of "sub-device is removed where the context entry is cleared
> for all aliases". But this commit didn't consider the PASID entry and PASID
> table in VT-d scalable mode. This fix increases the coverage of scalable
> mode.
> 
> Suggested-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
> Fixes: 8038bdb855331 ("iommu/vt-d: Only clear real DMA device's context entries")
> Fixes: 2b0140c69637e ("iommu/vt-d: Use pci_real_dma_dev() for mapping")
> Cc: stable@vger.kernel.org # v5.6+

Same here, what kernels is this to be applied to, and what is the "ANBZ"
tag?

thanks,

greg k-h

Re: [PATCH 05/19] iommu/vt-d: Global devTLB flush when present context entry changed

[Greg KH]

On Fri, May 06, 2022 at 11:43:25PM +0800, llfl(kun.hk) wrote:
> I am so sorry about that wrong email. I was backporting these patches from a
> mail list, and I added your email to cc list by accident.
> 
> 
> This 'ANBZ' mark is for alibaba inc. code base internal review.
> 
> 
> I am so sorry about those emails confuse you.

Why not submit these for inclusion in the real stable kernel releases,
so that you do not have to backport anything?

They need to go to older kernels, why duplicate the work for everyone?

thanks,

greg k-h