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[78.150.47.22]) by smtp.gmail.com with ESMTPSA id w4-20020adfcd04000000b0021863a560f6sm9593832wrm.3.2022.06.13.14.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 14:01:52 -0700 (PDT) Date: Mon, 13 Jun 2022 22:01:50 +0100 From: Sudip Mukherjee To: Greg Kroah-Hartman Cc: stable@vger.kernel.org Subject: backport of d51f86cfd8e3 ("powerpc/mm: Switch obsolete dssall to .long") Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="dPa1ZCj3sT5J8z27" Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org --dPa1ZCj3sT5J8z27 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Greg, The stable branches 4.19-stable and 5.4-stable will also need d51f86cfd8e3 ("powerpc/mm: Switch obsolete dssall to .long") for powerpc allmodconfig failure. The backport for both is in the attached mbox. -- Regards Sudip --dPa1ZCj3sT5J8z27 Content-Type: application/mbox Content-Disposition: attachment; filename="backport_5.4-stable.mbox" Content-Transfer-Encoding: quoted-printable =46rom 31612a4f9e0d8d479133e1bc89a58aac753f6eed Mon Sep 17 00:00:00 2001=0A= =46rom: Alexey Kardashevskiy =0ADate: Tue, 21 Dec 2021 16:59= :03 +1100=0ASubject: [PATCH] powerpc/mm: Switch obsolete dssall to .long=0A= =0Acommit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.=0A=0AThe dssal= l ("Data Stream Stop All") instruction is obsolete altogether=0Awith other = Data Cache Instructions since ISA 2.03 (year 2006).=0A=0ALLVM IAS does not = support it but PPC970 seems to be using it.=0AThis switches dssall to .long= as there is no much point in fixing LLVM.=0A=0ASigned-off-by: Alexey Karda= shevskiy =0ASigned-off-by: Michael Ellerman =0ALink: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs= =2Eru=0A[sudip: adjust context]=0ASigned-off-by: Sudip Mukherjee =0A---=0A arch/powerpc/include/asm/ppc-opcode.h | 2 ++= =0A arch/powerpc/kernel/idle_6xx.S | 2 +-=0A arch/powerpc/kernel/l= 2cr_6xx.S | 6 +++---=0A arch/powerpc/kernel/swsusp_32.S | = 2 +-=0A arch/powerpc/kernel/swsusp_asm64.S | 2 +-=0A arch/powerpc/mm/m= mu_context.c | 2 +-=0A arch/powerpc/platforms/powermac/cache.S | = 4 ++--=0A 7 files changed, 11 insertions(+), 9 deletions(-)=0A=0Adiff --git= a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opc= ode.h=0Aindex c1df75edde44..a9af63bd430f 100644=0A--- a/arch/powerpc/includ= e/asm/ppc-opcode.h=0A+++ b/arch/powerpc/include/asm/ppc-opcode.h=0A@@ -204,= 6 +204,7 @@=0A #define PPC_INST_ICBT 0x7c00002c=0A #define PPC_INST_ICSWX= 0x7c00032d=0A #define PPC_INST_ICSWEPX 0x7c00076d=0A+#define PPC_INST_D= SSALL 0x7e00066c=0A #define PPC_INST_ISEL 0x7c00001e=0A #define PPC_INS= T_ISEL_MASK 0xfc00003e=0A #define PPC_INST_LDARX 0x7c0000a8=0A@@ -439,6 = +440,7 @@=0A __PPC_RA(a) | __PPC_RB(b))=0A #define PPC_DCBZL(a, b) st= ringify_in_c(.long PPC_INST_DCBZL | \=0A __PPC_RA(a) | __PPC_RB(b))=0A= +#define PPC_DSSALL stringify_in_c(.long PPC_INST_DSSALL)=0A #define PPC_L= QARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \=0A ___PPC_RT= (t) | ___PPC_RA(a) | \=0A ___PPC_RB(b) | __PPC_EH(eh))=0Adiff --git a/= arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S=0Aindex 0ff= dd18b9f26..acb8215c5a01 100644=0A--- a/arch/powerpc/kernel/idle_6xx.S=0A+++= b/arch/powerpc/kernel/idle_6xx.S=0A@@ -129,7 +129,7 @@ BEGIN_FTR_SECTION= =0A END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)=0A mtspr SPRN_HID0,r4=0A BEGIN_F= TR_SECTION=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_= FTR_ALTIVEC)=0A lwz r8,TI_LOCAL_FLAGS(r2) /* set napping bit */=0Adiff --g= it a/arch/powerpc/kernel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S=0Ainde= x 2020d255585f..7684f644e93e 100644=0A--- a/arch/powerpc/kernel/l2cr_6xx.S= =0A+++ b/arch/powerpc/kernel/l2cr_6xx.S=0A@@ -96,7 +96,7 @@ END_FTR_SECTION= _IFCLR(CPU_FTR_L2CR)=0A =0A /* Stop DST streams */=0A BEGIN_FTR_SECTION=0A= - DSSALL=0A+ PPC_DSSALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)= =0A =0A@@ -293,7 +293,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)=0A isync=0A= =0A /* Stop DST streams */=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A =0A /* = Get the current enable bit of the L3CR into r4 */=0A@@ -402,7 +402,7 @@ END= _FTR_SECTION_IFSET(CPU_FTR_L3CR)=0A _GLOBAL(__flush_disable_L1)=0A /* Stop= pending alitvec streams and memory accesses */=0A BEGIN_FTR_SECTION=0A- DS= SALL=0A+ PPC_DSSALL=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A sync=0A = =0Adiff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsus= p_32.S=0Aindex cbdf86228eaa..54c44aea338c 100644=0A--- a/arch/powerpc/kerne= l/swsusp_32.S=0A+++ b/arch/powerpc/kernel/swsusp_32.S=0A@@ -181,7 +181,7 @@= _GLOBAL(swsusp_arch_resume)=0A #ifdef CONFIG_ALTIVEC=0A /* Stop pending a= litvec streams and memory accesses */=0A BEGIN_FTR_SECTION=0A- DSSALL=0A+ P= PC_DSSALL=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A #endif=0A sync=0Ad= iff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp= _asm64.S=0Aindex 6d3189830dd3..068a268a8013 100644=0A--- a/arch/powerpc/ker= nel/swsusp_asm64.S=0A+++ b/arch/powerpc/kernel/swsusp_asm64.S=0A@@ -142,7 += 142,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)=0A _GLOBAL(swsusp_arch_r= esume)=0A /* Stop pending alitvec streams and memory accesses */=0A BEGIN_= FTR_SECTION=0A- DSSALL=0A+ PPC_DSSALL=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTI= VEC)=0A sync=0A =0Adiff --git a/arch/powerpc/mm/mmu_context.c b/arch/power= pc/mm/mmu_context.c=0Aindex 18f20da0d348..64290d343b55 100644=0A--- a/arch/= powerpc/mm/mmu_context.c=0A+++ b/arch/powerpc/mm/mmu_context.c=0A@@ -79,7 += 79,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *n= ext,=0A * context=0A */=0A if (cpu_has_feature(CPU_FTR_ALTIVEC))=0A- = asm volatile ("dssall");=0A+ asm volatile (PPC_DSSALL);=0A =0A if (new_on= _cpu)=0A radix_kvm_prefetch_workaround(next);=0Adiff --git a/arch/powerpc= /platforms/powermac/cache.S b/arch/powerpc/platforms/powermac/cache.S=0Aind= ex da69e0fcb4f1..9b85b030cbeb 100644=0A--- a/arch/powerpc/platforms/powerma= c/cache.S=0A+++ b/arch/powerpc/platforms/powermac/cache.S=0A@@ -48,7 +48,7 = @@ flush_disable_75x:=0A =0A /* Stop DST streams */=0A BEGIN_FTR_SECTION= =0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVE= C)=0A =0A@@ -196,7 +196,7 @@ flush_disable_745x:=0A isync=0A =0A /* Stop = prefetch streams */=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A =0A /* Disable L= 2 prefetching */=0A-- =0A2.30.2=0A=0A --dPa1ZCj3sT5J8z27 Content-Type: application/mbox Content-Disposition: attachment; filename="backport_4.19-stable.mbox" Content-Transfer-Encoding: quoted-printable =46rom 6af13d6458ded03a1e0028f7cf83f05774ef83aa Mon Sep 17 00:00:00 2001=0A= =46rom: Alexey Kardashevskiy =0ADate: Tue, 21 Dec 2021 16:59= :03 +1100=0ASubject: [PATCH] powerpc/mm: Switch obsolete dssall to .long=0A= =0Acommit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.=0A=0AThe dssal= l ("Data Stream Stop All") instruction is obsolete altogether=0Awith other = Data Cache Instructions since ISA 2.03 (year 2006).=0A=0ALLVM IAS does not = support it but PPC970 seems to be using it.=0AThis switches dssall to .long= as there is no much point in fixing LLVM.=0A=0ASigned-off-by: Alexey Karda= shevskiy =0ASigned-off-by: Michael Ellerman =0ALink: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs= =2Eru=0A[sudip: adjust context]=0ASigned-off-by: Sudip Mukherjee =0A---=0A arch/powerpc/include/asm/ppc-opcode.h | 2 ++= =0A arch/powerpc/kernel/idle_6xx.S | 2 +-=0A arch/powerpc/kernel/l= 2cr_6xx.S | 6 +++---=0A arch/powerpc/kernel/swsusp_32.S | = 2 +-=0A arch/powerpc/kernel/swsusp_asm64.S | 2 +-=0A arch/powerpc/mm/m= mu_context.c | 2 +-=0A arch/powerpc/platforms/powermac/cache.S | = 4 ++--=0A 7 files changed, 11 insertions(+), 9 deletions(-)=0A=0Adiff --git= a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opc= ode.h=0Aindex d9d5391b2af6..d0d3dab56225 100644=0A--- a/arch/powerpc/includ= e/asm/ppc-opcode.h=0A+++ b/arch/powerpc/include/asm/ppc-opcode.h=0A@@ -207,= 6 +207,7 @@=0A #define PPC_INST_ICBT 0x7c00002c=0A #define PPC_INST_ICSWX= 0x7c00032d=0A #define PPC_INST_ICSWEPX 0x7c00076d=0A+#define PPC_INST_D= SSALL 0x7e00066c=0A #define PPC_INST_ISEL 0x7c00001e=0A #define PPC_INS= T_ISEL_MASK 0xfc00003e=0A #define PPC_INST_LDARX 0x7c0000a8=0A@@ -424,6 = +425,7 @@=0A __PPC_RA(a) | __PPC_RB(b))=0A #define PPC_DCBZL(a, b) st= ringify_in_c(.long PPC_INST_DCBZL | \=0A __PPC_RA(a) | __PPC_RB(b))=0A= +#define PPC_DSSALL stringify_in_c(.long PPC_INST_DSSALL)=0A #define PPC_L= QARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \=0A ___PPC_RT= (t) | ___PPC_RA(a) | \=0A ___PPC_RB(b) | __PPC_EH(eh))=0Adiff --git a/= arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S=0Aindex ff0= 26c9d3cab..75de66acc3d1 100644=0A--- a/arch/powerpc/kernel/idle_6xx.S=0A+++= b/arch/powerpc/kernel/idle_6xx.S=0A@@ -133,7 +133,7 @@ BEGIN_FTR_SECTION= =0A END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)=0A mtspr SPRN_HID0,r4=0A BEGIN_F= TR_SECTION=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_= FTR_ALTIVEC)=0A CURRENT_THREAD_INFO(r9, r1)=0Adiff --git a/arch/powerpc/ke= rnel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S=0Aindex 6e7dbb7d527c..9d4b= 42d115cd 100644=0A--- a/arch/powerpc/kernel/l2cr_6xx.S=0A+++ b/arch/powerpc= /kernel/l2cr_6xx.S=0A@@ -108,7 +108,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR= )=0A =0A /* Stop DST streams */=0A BEGIN_FTR_SECTION=0A- DSSALL=0A+ PPC_DS= SALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A =0A@@ -305,7 +30= 5,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)=0A isync=0A =0A /* Stop DST st= reams */=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A =0A /* Get the current enab= le bit of the L3CR into r4 */=0A@@ -414,7 +414,7 @@ END_FTR_SECTION_IFSET(C= PU_FTR_L3CR)=0A _GLOBAL(__flush_disable_L1)=0A /* Stop pending alitvec str= eams and memory accesses */=0A BEGIN_FTR_SECTION=0A- DSSALL=0A+ PPC_DSSALL= =0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A sync=0A =0Adiff --git a/arc= h/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S=0Aindex cbdf= 86228eaa..54c44aea338c 100644=0A--- a/arch/powerpc/kernel/swsusp_32.S=0A+++= b/arch/powerpc/kernel/swsusp_32.S=0A@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arc= h_resume)=0A #ifdef CONFIG_ALTIVEC=0A /* Stop pending alitvec streams and = memory accesses */=0A BEGIN_FTR_SECTION=0A- DSSALL=0A+ PPC_DSSALL=0A END_FT= R_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A #endif=0A sync=0Adiff --git a/arch/po= werpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S=0Aindex f8= 3bf6f72cb0..0af06f3dbb25 100644=0A--- a/arch/powerpc/kernel/swsusp_asm64.S= =0A+++ b/arch/powerpc/kernel/swsusp_asm64.S=0A@@ -143,7 +143,7 @@ END_FW_FT= R_SECTION_IFCLR(FW_FEATURE_LPAR)=0A _GLOBAL(swsusp_arch_resume)=0A /* Stop= pending alitvec streams and memory accesses */=0A BEGIN_FTR_SECTION=0A- DS= SALL=0A+ PPC_DSSALL=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A sync=0A = =0Adiff --git a/arch/powerpc/mm/mmu_context.c b/arch/powerpc/mm/mmu_context= =2Ec=0Aindex f84e14f23e50..78a638ccc70f 100644=0A--- a/arch/powerpc/mm/mmu_= context.c=0A+++ b/arch/powerpc/mm/mmu_context.c=0A@@ -83,7 +83,7 @@ void sw= itch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,=0A * con= text=0A */=0A if (cpu_has_feature(CPU_FTR_ALTIVEC))=0A- asm volatile ("= dssall");=0A+ asm volatile (PPC_DSSALL);=0A =0A if (new_on_cpu)=0A radi= x_kvm_prefetch_workaround(next);=0Adiff --git a/arch/powerpc/platforms/powe= rmac/cache.S b/arch/powerpc/platforms/powermac/cache.S=0Aindex 27862feee4a5= =2E.0dde4a7a6016 100644=0A--- a/arch/powerpc/platforms/powermac/cache.S=0A+= ++ b/arch/powerpc/platforms/powermac/cache.S=0A@@ -53,7 +53,7 @@ flush_disa= ble_75x:=0A =0A /* Stop DST streams */=0A BEGIN_FTR_SECTION=0A- DSSALL=0A+= PPC_DSSALL=0A sync=0A END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)=0A =0A@@ -20= 1,7 +201,7 @@ flush_disable_745x:=0A isync=0A =0A /* Stop prefetch stream= s */=0A- DSSALL=0A+ PPC_DSSALL=0A sync=0A =0A /* Disable L2 prefetching *= /=0A-- =0A2.30.2=0A=0A --dPa1ZCj3sT5J8z27--