From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2E36C43334 for ; Fri, 22 Jul 2022 11:58:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235072AbiGVL6w (ORCPT ); Fri, 22 Jul 2022 07:58:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235287AbiGVL6f (ORCPT ); Fri, 22 Jul 2022 07:58:35 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDB7EBB8DD; Fri, 22 Jul 2022 04:58:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658491110; x=1690027110; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=Bx69r+an13lTpJ7/4ygY3E3BfF7Z3MEC+MOG/HYjIDA=; b=Af3hL25CNKCjRf730QI2/PgeVa4ch35W8AmtsA5RRC5C9tvijjRXCB1u ya3gMDzIc3xb5LuobLNaQ+U/31x+89su9m98aD7Ou52wJbyXkxZGEwM8k y9Z/rqJUVTILKp55QW3E7wagGkeTG2YhUyqQPFrsrWGIdLB+RThxmxYtF 9DkCEtSbhUiSuq/PXYKoVmze4HDkJXCTZ52iihokGE82W6vFpt/dTRIlH B6LuOLcFR92R+j1y0jkB5bq7ZRxg7rCM8KoueF1XjJgZKH17J1AUzCFtd 7x1A4iBWybtqFR1duD0x5ZBJt4ORyj2HqinzGbYZpigpUv7e8sON1UaJn Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10415"; a="274154049" X-IronPort-AV: E=Sophos;i="5.93,185,1654585200"; d="scan'208";a="274154049" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2022 04:58:30 -0700 X-IronPort-AV: E=Sophos;i="5.93,185,1654585200"; d="scan'208";a="626536717" Received: from dstoll-mobl.ger.corp.intel.com (HELO intel.com) ([10.252.44.132]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2022 04:58:26 -0700 Date: Fri, 22 Jul 2022 13:58:25 +0200 From: Andi Shyti To: Mauro Carvalho Chehab Cc: Chris Wilson , Daniel Vetter , Dave Airlie , David Airlie , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Fei Yang , Andi Shyti , Thomas =?iso-8859-15?Q?Hellstr=F6m?= Subject: Re: [PATCH v2 04/21] drm/i915/gt: Only invalidate TLBs exposed to user manipulation Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Hi Mauro, On Thu, Jul 14, 2022 at 01:06:09PM +0100, Mauro Carvalho Chehab wrote: > From: Chris Wilson > > Don't flush TLBs when the buffer is only used in the GGTT under full > control of the kernel, as there's no risk of concurrent access > and stale access from prefetch. > > We only need to invalidate the TLB if they are accessible by the user. > That helps to reduce the performance regression introduced by TLB > invalidate logic. > > Cc: stable@vger.kernel.org > Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") > Signed-off-by: Chris Wilson > Cc: Fei Yang > Cc: Andi Shyti > Acked-by: Thomas Hellström > Signed-off-by: Mauro Carvalho Chehab Please, once you have sorted out Tvrtko's question you can add: Reviewed-by: Andi Shyti Thanks, Andi