Re: [PATCH] drm/amdgpu: correct gpu clock counter query on cyan skilfish

[Lang Yu <Lang.Yu@amd.com>]

O 09/21/ , Lang Yu wrote:

Sorry for sending this patch twice. Please ignore this one.

Regards,
Lang

> Cayn skilfish uses SMUIO v11.0.8 offset.
> 
> Signed-off-by: Lang Yu <Lang.Yu@amd.com>
> Cc: <stable@vger.kernel.org> # v5.15+
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 1d671c330475..c16ca611886b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -102,6 +102,11 @@
>  #define mmGCR_GENERAL_CNTL_Sienna_Cichlid			0x1580
>  #define mmGCR_GENERAL_CNTL_Sienna_Cichlid_BASE_IDX	0
>  
> +#define mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish                0x0105
> +#define mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish_BASE_IDX       1
> +#define mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish                0x0106
> +#define mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish_BASE_IDX       1
> +
>  #define mmGOLDEN_TSC_COUNT_UPPER_Vangogh                0x0025
>  #define mmGOLDEN_TSC_COUNT_UPPER_Vangogh_BASE_IDX       1
>  #define mmGOLDEN_TSC_COUNT_LOWER_Vangogh                0x0026
> @@ -7313,6 +7318,22 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev)
>  	uint64_t clock, clock_lo, clock_hi, hi_check;
>  
>  	switch (adev->ip_versions[GC_HWIP][0]) {
> +	case IP_VERSION(10, 1, 3):
> +	case IP_VERSION(10, 1, 4):
> +		preempt_disable();
> +		clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish);
> +		clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish);
> +		hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish);
> +		/* The SMUIO TSC clock frequency is 100MHz, which sets 32-bit carry over
> +		 * roughly every 42 seconds.
> +		 */
> +		if (hi_check != clock_hi) {
> +			clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish);
> +			clock_hi = hi_check;
> +		}
> +		preempt_enable();
> +		clock = clock_lo | (clock_hi << 32ULL);
> +		break;
>  	case IP_VERSION(10, 3, 1):
>  	case IP_VERSION(10, 3, 3):
>  	case IP_VERSION(10, 3, 7):
> -- 
> 2.25.1
>