Re: [RESEND RFC PATCH v3 1/6] drm/amdgpu: Change AMDGPU_VA_RESERVED_TRAP_SIZE to 2 PAGE_SIZE pages

[Donet Tom <donettom@linux.ibm.com>]

On 3/25/26 11:24 PM, Kuehling, Felix wrote:
>
> On 2026-03-25 06:29, Christian König wrote:
>>> Hi @Christian @Felix
>>>
>>> Thanks for the review.
>>>
>>> I have made the suggested change. I am now reserving 64 KB
>>> in the  address space for the trap, while allocating
>>> only 8 KB for both 4K and 64K page sizes. With this change,
>>> I am no longer seeing crashes on either 4K or 64K systems.
>>>
>>> Does this approach look reasonable to you?
>> Looks correct to me, but Felix clearly has the last word on that.
>
> That works for me as well.


Thank you , Felix. I will incorporate this change and post an updated 
version.

-Donet


>
> Thanks,
>   Felix
>
>
>>
>> Regards,
>> Christian.
>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>>> index bb276c0ad06d..d5b7061556ba 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>>> @@ -173,7 +173,7 @@ struct amdgpu_bo_vm;
>>>   #define AMDGPU_VA_RESERVED_SEQ64_SIZE          (2ULL << 20)
>>>   #define AMDGPU_VA_RESERVED_SEQ64_START(adev) 
>>>  (AMDGPU_VA_RESERVED_CSA_START(adev) \
>>>                                                   - 
>>> AMDGPU_VA_RESERVED_SEQ64_SIZE)
>>> -#define AMDGPU_VA_RESERVED_TRAP_SIZE           (2ULL << 12)
>>> +#define AMDGPU_VA_RESERVED_TRAP_SIZE           (1ULL << 16)
>>>   #define AMDGPU_VA_RESERVED_TRAP_START(adev) 
>>> (AMDGPU_VA_RESERVED_SEQ64_START(adev) \
>>>                                                   - 
>>> AMDGPU_VA_RESERVED_TRAP_SIZE)
>>>   #define AMDGPU_VA_RESERVED_BOTTOM              (1ULL << 16)
>>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h 
>>> b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>>> index e5b56412931b..035687a17d89 100644
>>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>>> @@ -102,8 +102,8 @@
>>>    * The first chunk is the TBA used for the CWSR ISA code. The second
>>>    * chunk is used as TMA for user-mode trap handler setup in 
>>> daisy-chain mode.
>>>    */
>>> -#define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
>>> -#define KFD_CWSR_TMA_OFFSET (PAGE_SIZE + 2048)
>>> +#define KFD_CWSR_TBA_TMA_SIZE (AMDGPU_GPU_PAGE_SIZE * 2)
>>> +#define KFD_CWSR_TMA_OFFSET (AMDGPU_GPU_PAGE_SIZE + 2048)
>>>
>>>   #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE               \
>>>          (KFD_MAX_NUM_OF_PROCESSES *