From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Kevin Brodsky <kevin.brodsky@arm.com>
Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, rafael@kernel.org,
pavel@kernel.org, catalin.marinas@arm.com, will@kernel.org,
anshuman.khandual@arm.com, ryan.roberts@arm.com,
yang@os.amperecomputing.com, joey.gouly@arm.com,
stable@vger.kernel.org
Subject: Re: [PATCH v2] arm64: fix cleared E0POE bit after cpu_suspend()/resume()
Date: Wed, 7 Jan 2026 17:30:39 +0000 [thread overview]
Message-ID: <aV6YPyLV1quaOkyw@e129823.arm.com> (raw)
In-Reply-To: <846e1998-b508-4433-9db6-3a52ff23552f@arm.com>
Hi Kevin,
[...]
> > @@ -144,6 +148,10 @@ SYM_FUNC_START(cpu_do_resume)
> > msr tcr_el1, x8
> > msr vbar_el1, x9
> > msr mdscr_el1, x10
> > +alternative_if ARM64_HAS_TCR2
> > + ldr x2, [x0, #104]
> > + msr REG_TCR2_EL1, x2
> > +alternative_else_nop_endif
>
> Maybe this could be pushed further down cpu_do_resume, next to DISR_EL1
> maybe (since it's also conditional)? Otherwise the diff LGTM:
Sorry but IIUC, currently there is no DISR_EL1 save/restore not yet?
and I think current place is good where before restore SCTLR_EL1 which
before MMU enabled.
Am I missing something?
Thanks.
--
Sincerely,
Yeoreum Yun
next prev parent reply other threads:[~2026-01-07 17:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-07 16:21 [PATCH v2] arm64: fix cleared E0POE bit after cpu_suspend()/resume() Yeoreum Yun
2026-01-07 16:54 ` Kevin Brodsky
2026-01-07 17:30 ` Yeoreum Yun [this message]
2026-01-12 9:36 ` Kevin Brodsky
2026-01-08 5:25 ` Anshuman Khandual
2026-01-09 18:00 ` Catalin Marinas
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