From: Raag Jadav <raag.jadav@intel.com>
To: Guido Trentalancia <guido@trentalancia.com>
Cc: andriy.shevchenko@linux.intel.com,
mika.westerberg@linux.intel.com, linusw@kernel.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH v2] pinctrl: intel: Add code name documentation
Date: Mon, 26 Jan 2026 17:37:10 +0100 [thread overview]
Message-ID: <aXeYNiRrBvIwxCRe@black.igk.intel.com> (raw)
In-Reply-To: <1769258197.8360.4.camel@trentalancia.com>
On Sat, Jan 24, 2026 at 01:36:37PM +0100, Guido Trentalancia wrote:
> On Sat, 24/01/2026 at 13.44 +0530, Raag Jadav wrote:
> > Intel pinctrl drivers support large set of platforms and the IPs are
> > often reused by their different variants, but it's currently not
> > possible
> > to figure out the exact driver that supports specific variant. Add
> > user
> > friendly documentation for them.
> >
> > Cc: stable@vger.kernel.org
> > Reported-by: Guido Trentalancia <guido@trentalancia.com>
> > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220056
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> > Acked-by: Guido Trentalancia <guido@trentalancia.com>
> > ---
> >
> > v2: Also document for other similar drivers (Andy)
> >
> > drivers/pinctrl/intel/Kconfig | 21 +++++++++++++++------
> > 1 file changed, 15 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/pinctrl/intel/Kconfig
> > b/drivers/pinctrl/intel/Kconfig
> > index e4dc9ba899bd..488344f53d45 100644
> > --- a/drivers/pinctrl/intel/Kconfig
> > +++ b/drivers/pinctrl/intel/Kconfig
> > @@ -53,7 +53,10 @@ config PINCTRL_ALDERLAKE
> > select PINCTRL_INTEL
> > help
> > This pinctrl driver provides an interface that allows
> > configuring
> > - of Intel Alder Lake PCH pins and using them as GPIOs.
> > + PCH pins of the following platforms and using them as
> > GPIOs:
> > + - Alder Lake HX, N and S
> > + - Raptor Lake HX, E and S
> > + - Twin Lake
> >
> > config PINCTRL_BROXTON
> > tristate "Intel Broxton pinctrl and GPIO driver"
> > @@ -137,15 +140,17 @@ config PINCTRL_METEORLAKE
> > select PINCTRL_INTEL
> > help
> > This pinctrl driver provides an interface that allows
> > configuring
> > - of Intel Meteor Lake pins and using them as GPIOs.
> > + SoC pins of the following platforms and using them as
> > GPIOs:
> > + - Arrow Lake (all variants)
>
> If the next entry refers to Arrow Lake HX and S platforms, this one
> (METEORLAKE) cannot include "all variants" for Arrow Lake, I suppose.
And hence the updated description :)
It's SoC vs PCH.
Raag
> > + - Meteor Lake (all variants)
> >
> > config PINCTRL_METEORPOINT
> > tristate "Intel Meteor Point pinctrl and GPIO driver"
> > select PINCTRL_INTEL
> > help
> > - Meteor Point is the PCH of Intel Meteor Lake. This pinctrl
> > driver
> > - provides an interface that allows configuring of PCH pins
> > and
> > - using them as GPIOs.
> > + This pinctrl driver provides an interface that allows
> > configuring
> > + PCH pins of the following platforms and using them as
> > GPIOs:
> > + - Arrow Lake HX and S
> >
> > config PINCTRL_SUNRISEPOINT
> > tristate "Intel Sunrisepoint pinctrl and GPIO driver"
> > @@ -160,7 +165,11 @@ config PINCTRL_TIGERLAKE
> > select PINCTRL_INTEL
> > help
> > This pinctrl driver provides an interface that allows
> > configuring
> > - of Intel Tiger Lake PCH pins and using them as GPIOs.
> > + PCH pins of the following platforms and using them as
> > GPIOs:
> > + - Alder Lake H, P, PS and U
> > + - Raptor Lake H, P, PS, PX and U
> > + - Rocket Lake S
> > + - Tiger Lake (all variants)
> >
> > source "drivers/pinctrl/intel/Kconfig.tng"
> > endmenu
prev parent reply other threads:[~2026-01-26 16:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-24 8:14 [PATCH v2] pinctrl: intel: Add code name documentation Raag Jadav
2026-01-24 9:52 ` Andy Shevchenko
2026-01-24 12:36 ` Guido Trentalancia
2026-01-26 16:37 ` Raag Jadav [this message]
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