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Mon, 9 Feb 2026 10:09:50 +0000 Date: Mon, 9 Feb 2026 12:09:45 +0200 From: Imre Deak To: "Borah, Chaitanya Kumar" , "Nautiyal, Ankit K" , , , Subject: Re: [PATCH 1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR Message-ID: Reply-To: References: <20260206104227.290231-1-imre.deak@intel.com> <9ca3365b-c595-4401-8663-9c18ccc45d45@intel.com> <459f2c53-8679-4987-b190-c7f9c54f237a@intel.com> Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland X-ClientProxiedBy: GV3P280CA0020.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:b::32) To SJ0PR11MB4845.namprd11.prod.outlook.com (2603:10b6:a03:2d1::10) Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR11MB4845:EE_|LV8PR11MB8724:EE_ X-MS-Office365-Filtering-Correlation-Id: b6bd1dd0-8673-4490-1fb2-08de67c35ca9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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> > > > > >       bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); > > > > > >       struct intel_connector *connector = > > > > > >           to_intel_connector(conn_state->connector); > > > > > > @@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp > > > > > > *intel_dp, > > > > > >       limits->min_lane_count = intel_dp_min_lane_count(intel_dp); > > > > > >       limits->max_lane_count = intel_dp_max_lane_count(intel_dp); > > > > > > -    limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : > > > > > > -                intel_dp_min_bpp(crtc_state->output_format); > > > > > > +    limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); > > > > > >       if (is_mst) { > > > > > >           /* > > > > > >            * FIXME: If all the streams can't fit into the link with their > > > > > > @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct > > > > > > intel_dp *intel_dp, > > > > > >                               respect_downstream_limits); > > > > > >       } > > > > > > +    if (intel_dp_in_hdr_mode(conn_state)) { > > > > > > +        if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) > > > > > > +            limits->pipe.min_bpp = 30; > > > > > > +        else > > > > > > +            drm_dbg_kms(display->drm, > > > > > > +                    "[CONNECTOR:%d:%s] HDR min 30 bpp outside of > > > > > > valid pipe bpp range (%d-%d)\n", > > > > > > +                    connector->base.base.id, connector->base.name, > > > > > > +                    limits->pipe.min_bpp, limits->pipe.max_bpp); > > > > > > > > > > > > > > > pipe.max_bpp < 30 will be either due to the max_bpc property set to less > > > > > than 10, or perhaps when the panel itself does not support 10 bpc > > > > > (limited by EDID or VBT). > > > > > With these constraints doesn't make sense to enable HDR and send HDR > > > > > metadata. > > > > > However, as we see in some reported issues [1] [2], in practice some > > > > > compositor seems to enable HDR by default and with the hard limit set, > > > > > they report blankout. > > > > > So it does make sense to raise the min bpp limit only if its inside the > > > > > supported range. > > > > > > > > > > Reviewed-by: Ankit Nautiyal > > > > > > > > > > > > > > > [1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052 > > > > > [2] https://gitlab.freedesktop.org/drm/i915/kernel/-/ > > > > > issues/5969#note_3248404 > > > > > > > > > > > > > I am not sure if this patch would help with the above gitlabs. For example > > > > in case of #7052 pipe max bpp is 30 and the commit still fails. > > > > > > It does fix though reported cases where the sink does not support 10 BPC > > > at all. Yes the monitor in #7052 is still a problem, since it supports > > > 10 BPC only with lower resolution, where the link BW would allow this > > > and he monitor doesn't have DSC either. > > > > > > > However, I need to look deeper. > > > > > > > > I am thinking of relaxing this restriction all together because the earlier > > > > assumption that a panel advertising HDR will support atleast 10bpc in all > > > > it's mode turns out to be false. > > > > > > > > Currently, I am inclined on the following policy. > > > > > > > > - If DSC is not available, fall back to normal bandwidth calculations and > > > > select the highest bpp the link can support. (Also preferred by Kwin) > > > > > > > > - If DSC is available, prefer falling back to DSC and attempt the highest > > > > bpp allowed by bandwidth constraints. > > > > > > The patch does the above, except for not handling the case where the > > > monitor doesn't support DSC. The attach patch handles that too and so > > > fixes #7052 as well, are you ok with it? > > > > This should work since [1] did. > > I think the sink / source support for 10 BPC should be still checked as > in this patch. > > > There is one more (theoritical) scenario that I think is still not covered. > > What happens in a case where 30bpp doesnot fit into DSC bandwidth? > > As I understand, the min bpp limit of 30bpp would become a bottle-neck even > > then? > > No, the link BW requirement is determined by the link BPP, not the pipe > BPP for which the minimum is set. The link BPP in DSC mode can be > lowered below that, based on the sink's minimum compressed BPP support. > So in the fallback case, where 30 BPP uncompressed mode is not > supported by the sink due to a BW limit, DSC is used instead lowering > the compressed link BPP as required. Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be: if (intel_dp_in_hdr_mode(conn_state) && intel_dp_supports_dsc(intel_dp, connector, crtc_state) && !dsc) { ... > > [1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47 > > > > > > > > > I am working on a patch for this and should be able to float something soon. > > > > Imre, if you agree with this policy, would you please wait for the patch. > > > > That should make it easier to send out fix for stable kernels. > > > > > > > > == > > > > Chaitanya > > > > > > > > > > +    } > > > > > > + > > > > > >       if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, > > > > > > limits)) > > > > > >           return false; > > > > > >