Re: [PATCH v2 2/3] PCI: tegra194: Reset BARs when running in PCIe endpoint mode

[Niklas Cassel <cassel@kernel.org>]

On Sun, Feb 08, 2026 at 11:41:42PM +0530, Manikanta Maddireddy wrote:
> Hi Niklas,
> 
> Tegra PCIe exposes only DMA register over BAR4, not iATU.
> So, the issue described in this commit message is not applicable.
> This patch is disabling BAR2 and BAR4, after enumeration I see
> only BAR0. I think we should revert this patch.
> Please share your inputs on this.

If you look at this commit, it only disables all BARs by default,
which brings the tegra driver in-line with all other DWC based
endpoint drivers: dra7xx, imx6, layerscape-ep, artpec6, dw-rockchip,
qcom-ep, rcar-gen4, and uniphier-ep.

A PCI endpoint function (EPF) driver will still be able to enable a
BAR that was disabled in .init().
However, an EPF driver will not be able to use/enable a reserved BAR.

Look at e.g. the code in pci-epf-test. It will not allocate backing
memory for a BAR that is reserved, so having a BAR enabled that we
have not allocated backing memory for is wrong.

Commit c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint
mode in Tegra194") is the commit that marked all BARs other than
BAR0 as reserved, so if you want to test BARs other than BAR0,
talk to the author of that commit.

If you revert this patch, tools/testing/selftests/pci_endpoint/pci_endpoint_test
will once again fail the consecutive BAR test, so I think it would
be wrong to revert this patch.

If it is ATU registers or eDMA registers exposed in BAR4 does not
really matter. The end result is that you overwrite eDMA registers
that you should not be overwriting when you run the BAR tests.
(So BAR4 should absolutely be marked as reserved).

I don't recall, but if you overwrite the eDMA registers, then in
addition to the consecutive BAR test failing, most likely the DMA
test cases will also fail.

Have you tried running
tools/testing/selftests/pci_endpoint/pci_endpoint_test
?


Kind regards,
Niklas