From: Niklas Cassel <cassel@kernel.org>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
Aksh Garg <a-garg7@ti.com>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Vidya Sagar" <vidyas@nvidia.com>,
"Shin'ichiro Kawasaki" <shinichiro.kawasaki@wdc.com>,
stable@vger.kernel.org, "Thierry Reding" <treding@nvidia.com>,
linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>
Subject: Re: [PATCH v2 2/3] PCI: tegra194: Reset BARs when running in PCIe endpoint mode
Date: Tue, 10 Feb 2026 11:39:08 +0100 [thread overview]
Message-ID: <aYsKzBjmGEi1z0am@ryzen> (raw)
In-Reply-To: <aYsDDOZA18BBeOsd@ryzen>
On Tue, Feb 10, 2026 at 11:06:04AM +0100, Niklas Cassel wrote:
> BAR_RESERVED already means disabled, it just assumes that an EPC driver
> disables all BARs by default, which is the case for:
> pci-dra7xx.c, pci-imx6.c, pci-layerscape-ep.c, pcie-artpec6.c,
> pcie-designware-plat.c, pcie-dw-rockchip.c, pcie-qcom-ep.c, pcie-rcar-gen4.c,
> pcie-stm32-ep.c, pcie-uniphier-ep.c.
> (All drivers which disables all BARs by default in the init() callback using
> dw_pcie_ep_reset_bar(). pci-epf-test will later enable all BARs that are not
> marked as BAR_RESERVED.)
>
> That leaves: pcie-keembay.c, pci-keystone.c, pcie-tegra194.c (before my patch).
>
> For pcie-keembay.c, this is not a problem, because BAR0, BAR2, BAR4 are marked
> as only_64bit, so pci-epf-test configure these BARs as 64-bit BARs, and thus
> BAR1, BAR3, and BAR5 will get disabled implicitly.
>
> For pci-keystone.c, this is the only driver that is a bit weird, it marks
> BAR0 and BAR1 as reserved, but does not disable them in the init() callback.
> It seems force set BAR0 as a 32-bit BAR in the init() callback.
>
> Thus, for all drivers except for pci-keystone.c, BAR_RESERVED does mean
> BAR_DISABLED. Feel free to send a patch that renames BAR_RESERVED to
> BAR_DISABLED.
>
> If you send such a patch, perhaps you also want to modify the PCI endpoint
> core to call reset_bar() for all BARs marked as BAR_RESERVED/BAR_DISABLED,
> instead of each EPC driver doing so in the init() callback. I think the main
> reason why this is not done already is that thare is no reset_bar() op in
> struct pci_epc_ops epc_ops, there is only clear_bar() which clears an BAR
> enabled by an EPF driver. (So you would most likely also need to add a
> .disable_bar() op in struct pci_epc_ops epc_ops.)
Aksh (on To:),
since you have a @ti.com email, perhaps you can explain how pci-keystone.c
can pass all the pci-epf-test test cases, considering that this is the only
driver that has BARs (BAR0 and BAR1) marked as BAR_RESERVED but do not also
disable the BARs (using dw_pcie_ep_reset_bar()) in the init() callback.
Or, perhaps the simple answer is that pci-keystone.c does not pass all
pci-epf-test test cases?
Kind regards,
Niklas
next prev parent reply other threads:[~2026-02-10 10:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250922140822.519796-5-cassel@kernel.org>
2025-09-22 14:08 ` [PATCH v2 1/3] PCI: tegra194: Fix broken tegra_pcie_ep_raise_msi_irq() Niklas Cassel
2025-09-24 15:54 ` Manivannan Sadhasivam
2025-09-24 16:28 ` Manivannan Sadhasivam
2025-09-25 14:52 ` Niklas Cassel
2025-09-22 14:08 ` [PATCH v2 2/3] PCI: tegra194: Reset BARs when running in PCIe endpoint mode Niklas Cassel
2026-02-08 18:11 ` Manikanta Maddireddy
2026-02-09 18:27 ` Niklas Cassel
2026-02-10 4:10 ` Manikanta Maddireddy
2026-02-10 10:06 ` Niklas Cassel
2026-02-10 10:39 ` Niklas Cassel [this message]
2026-02-12 12:10 ` Aksh Garg
2026-02-12 12:20 ` Niklas Cassel
2026-02-12 13:46 ` Aksh Garg
[not found] ` <c8e42e96-212f-451d-802b-7166611f6fcd@nvidia.com>
2026-02-10 11:04 ` Niklas Cassel
2026-02-08 18:21 ` Manikanta Maddireddy
2025-09-22 14:08 ` [PATCH v2 3/3] PCI: tegra194: Handle errors in BPMP response Niklas Cassel
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