From: Lukas Wunner <lukas@wunner.de>
To: Rich Hanes <georgebastille@gmail.com>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, mario.limonciello@amd.com,
stable@vger.kernel.org
Subject: Re: [PATCH] PCI/PM: Don't call pci_pm_power_up_and_verify_state() for devices already in D0
Date: Wed, 4 Mar 2026 18:52:19 +0100 [thread overview]
Message-ID: <aahxU99mfH2LZfrZ@wunner.de> (raw)
In-Reply-To: <20260304170324.67076-1-georgebastille@gmail.com>
On Wed, Mar 04, 2026 at 05:03:24PM +0000, Rich Hanes wrote:
> Reproduced on a Lenovo ThinkPad with Intel Wireless-AC 7265 (8086:095a)
> behind PCIe root port 8086:9d10. The workaround pcie_aspm=off confirms
> that suppressing L1 PM substate configuration prevents the failure.
The same issue was observed on a Google Pixelbook Eve:
https://bugzilla.kernel.org/show_bug.cgi?id=220705
That laptop also uses an i7265 attached to a Sunrise Point-LP PCH.
The PCH suffers from a hardware erratum, it doesn't reinstate the
clock quick enough after CLREQ# assertion to stay below the
spec-prescribed 400 nsec.
Intel's specification update recommends disabling CLKREQ# support
at the Root Port to work around the issue. This must be done by
the BIOS, an operating system patch isn't the right approach.
I've prepared a BIOS change for the coreboot BIOS used on the
Pixelbook, see the above-linked bugzilla. It has not been
upstreamed yet as I'm waiting on the reporter to test it.
If your ThinkPad can be made to boot with coreboot, I can look into
porting the patch over to your machine. Please specify the exact
Thinkpad model you're using. Otherwise please check whether Lenovo
has released a BIOS update for your machine.
Thanks,
Lukas
prev parent reply other threads:[~2026-03-04 18:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 17:03 [PATCH] PCI/PM: Don't call pci_pm_power_up_and_verify_state() for devices already in D0 Rich Hanes
2026-03-04 17:52 ` Lukas Wunner [this message]
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