Re: [PATCH 3/7] media: rzv2h-ivc: Write AXIRX_PIXFMT once

[Jacopo Mondi <jacopo.mondi@ideasonboard.com>]

Hi Dan

On Fri, Mar 13, 2026 at 04:07:47PM +0000, Dan Scally wrote:
> Hi Jacopo (and Barnabás)
>
> On 13/03/2026 11:13, Jacopo Mondi wrote:
> > From: Barnabás Pőcze <barnabas.pocze+renesas@ideasonboard.com>
> >
> > The documentation prescribes that invalid formats should not be set,
> > so do a single write to ensure that both the CLFMT and DTYPE fields
> > are set to valid values.
> >
> > Cc: stable@vger.kernel.org
> > Fixes: f0b3984d821b ("media: platform: Add Renesas Input Video Control block driver")
> > Signed-off-by: Barnabás Pőcze <barnabas.pocze+renesas@ideasonboard.com>
> > Signed-off-by: Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
> > ---
> >   drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c | 8 ++++----
> >   drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h       | 7 ++++---
> >   2 files changed, 8 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c
> > index bfe5b0c7045e..d894a880c33f 100644
> > --- a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c
> > +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c
> > @@ -215,10 +215,10 @@ static void rzv2h_ivc_format_configure(struct rzv2h_ivc *ivc)
> >   	/* Currently only CRU packed pixel formats are supported */
> >   	rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_PXFMT,
> > -			RZV2H_IVC_INPUT_FMT_CRU_PACKED);
> > -
> > -	rzv2h_ivc_update_bits(ivc, RZV2H_IVC_REG_AXIRX_PXFMT,
> > -			      RZV2H_IVC_PXFMT_DTYPE, fmt->dtype);
> > +			FIELD_PREP(RZV2H_IVC_AXIRX_PXFMT_FIELD_DTYPE,
> > +				   fmt->dtype) |
> > +			FIELD_PREP(RZV2H_IVC_AXIRX_PXFMT_FIELD_CLFMT,
> > +				   RZV2H_IVC_CLFMT_CRU_PACKED));
>
> TIL of FIELD_PREP(), I like that! Maybe #include <linux/bitfield.h> though?

It has been included in the previous patch if I'm not mistaken ?

>
> Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
>
> >   	rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_HSIZE, pix->width);
> >   	rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_VSIZE, pix->height);
> > diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h
> > index 4ef44c8b4656..54c70de31c1e 100644
> > --- a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h
> > +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h
> > @@ -24,9 +24,10 @@
> >   #define RZV2H_IVC_ONE_EXPOSURE				0x00
> >   #define RZV2H_IVC_TWO_EXPOSURE				0x01
> >   #define RZV2H_IVC_REG_AXIRX_PXFMT			0x0004
> > -#define RZV2H_IVC_INPUT_FMT_MIPI			(0 << 16)
> > -#define RZV2H_IVC_INPUT_FMT_CRU_PACKED			BIT(16)
> > -#define RZV2H_IVC_PXFMT_DTYPE				GENMASK(7, 0)
> > +#define RZV2H_IVC_AXIRX_PXFMT_FIELD_CLFMT		GENMASK(17, 16)
> > +#define RZV2H_IVC_CLFMT_MIPI				0
> > +#define RZV2H_IVC_CLFMT_CRU_PACKED			1
> > +#define RZV2H_IVC_AXIRX_PXFMT_FIELD_DTYPE		GENMASK(7, 0)
> >   #define RZV2H_IVC_REG_AXIRX_SADDL_P0			0x0010
> >   #define RZV2H_IVC_REG_AXIRX_SADDH_P0			0x0014
> >   #define RZV2H_IVC_REG_AXIRX_SADDL_P1			0x0018
> >
>