From: Breno Leitao <leitao@debian.org>
To: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
James Clark <james.clark@linaro.org>,
Thomas Gleixner <tglx@kernel.org>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
kernel-team@meta.com, stable@vger.kernel.org
Subject: Re: [PATCH v2] perf/x86: Move event pointer setup earlier in x86_pmu_enable()
Date: Fri, 13 Mar 2026 06:23:41 -0700 [thread overview]
Message-ID: <abQPM7zKWBaNJufd@gmail.com> (raw)
In-Reply-To: <9e0e04e9-7421-4dfb-a017-c31741a8d500@linux.intel.com>
On Thu, Mar 12, 2026 at 10:53:59AM +0800, Mi, Dapeng wrote:
> On 3/12/2026 4:40 AM, Peter Zijlstra wrote:
> > Subject: x86/perf: Make sure to program the counter value for stopped events on migration
> > From: Peter Zijlstra <peterz@infradead.org>
> > Date: Wed Mar 11 21:29:14 CET 2026
> >
> > Both Mi Dapeng and Ian Rogers noted that not everything that sets HES_STOPPED
> > is required to EF_UPDATE. Specifically the 'step 1' loop of rescheduling
> > explicitly does EF_UPDATE to ensure the counter value is read.
> >
> > However, then 'step 2' simply leaves the new counter uninitialized when
> > HES_STOPPED, even though, as noted above, the thing that stopped them might not
> > be aware it needs to EF_RELOAD -- since it didn't EF_UPDATE on stop.
> >
> > One such location that is affected is throttling, throttle does pmu->stop(, 0);
> > and unthrottle does pmu->start(, 0); possibly restarting an uninitialized counter.
> >
> > Fixes: a4eaf7f14675 ("perf: Rework the PMU methods")
> > Reported-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> > Reported-by: Ian Rogers <irogers@google.com>
> > Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> > ---
> > arch/x86/events/core.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > --- a/arch/x86/events/core.c
> > +++ b/arch/x86/events/core.c
> > @@ -1374,8 +1374,10 @@ static void x86_pmu_enable(struct pmu *p
> >
> > cpuc->events[hwc->idx] = event;
> >
> > - if (hwc->state & PERF_HES_ARCH)
> > + if (hwc->state & PERF_HES_ARCH) {
> > + static_call(x86_pmu_set_period)(event);
> > continue;
> > + }
> >
> > /*
> > * if cpuc->enabled = 0, then no wrmsr as
>
> LGTM.
>
> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Thank you for the patch and the discussion. To confirm my understanding:
this patch should be applied on top of my v2 series to fully resolve the
issue, correct?
If so, would you prefer that I include both patches together in a single
series, or are you fine with them as-is?
Thanks,
--breno
next prev parent reply other threads:[~2026-03-13 13:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 10:13 [PATCH v2] perf/x86: Move event pointer setup earlier in x86_pmu_enable() Breno Leitao
2026-03-11 2:04 ` Mi, Dapeng
2026-03-11 16:37 ` Ian Rogers
2026-03-11 17:35 ` Peter Zijlstra
2026-03-11 20:40 ` Peter Zijlstra
2026-03-12 2:53 ` Mi, Dapeng
2026-03-13 13:23 ` Breno Leitao [this message]
2026-03-13 15:35 ` Peter Zijlstra
2026-03-13 16:57 ` Breno Leitao
2026-03-12 1:46 ` Mi, Dapeng
2026-03-11 17:18 ` Peter Zijlstra
2026-03-12 1:05 ` Mi, Dapeng
2026-03-16 9:50 ` [tip: perf/urgent] " tip-bot2 for Breno Leitao
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