Re: FAILED: patch "[PATCH] drm/i915/psr: Write DSC parameters on Selective Update in ET" failed to apply to 6.19-stable tree

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Tue, 2026-03-17 at 14:25 +0100, gregkh@linuxfoundation.org wrote:
> 
> The patch below does not apply to the 6.19-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git
> commit
> id to <stable@vger.kernel.org>.

You can solve this by first cherry-picking two dependencies:

c2c79c6d5b939ae8a42ddb884f576bddae685672 (drm/i915/dsc: Add Selective
Update register definition)

bb5f1cd10101c2567bff4d0e760b74aee7c42f44 (drm/i915/dsc: Add helper for
writing DSC Selective Update ET parameters)

and only after that the fix itself:

5923a6e0459fdd3edac4ad5abccb24d777d8f1b6 (drm/i915/psr: Write DSC
parameters on Selective Update in ET mode)

BR,
Jouni Högander

> 
> To reproduce the conflict and resubmit, you may use the following
> commands:
> 
> git fetch
> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ lin
> ux-6.19.y
> git checkout FETCH_HEAD
> git cherry-pick -x 5923a6e0459fdd3edac4ad5abccb24d777d8f1b6
> # <resolve conflicts, build, test, etc.>
> git commit -s
> git send-email --to '<stable@vger.kernel.org>' --in-reply-to
> '2026031712-strep-autopilot-0999@gregkh' --subject-prefix 'PATCH
> 6.19.y' HEAD^..
> 
> Possible dependencies:
> 
> 
> 
> thanks,
> 
> greg k-h
> 
> ------------------ original commit in Linus's tree ------------------
> 
> From 5923a6e0459fdd3edac4ad5abccb24d777d8f1b6 Mon Sep 17 00:00:00
> 2001
> From: =?UTF-8?q?Jouni=20H=C3=B6gander?= <jouni.hogander@intel.com>
> Date: Wed, 4 Mar 2026 13:30:11 +0200
> Subject: [PATCH] drm/i915/psr: Write DSC parameters on Selective
> Update in ET
>  mode
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
> 
> There are slice row per frame and pic height parameters in DSC that
> needs
> to be configured on every Selective Update in Early Transport mode.
> Use
> helper provided by DSC code to configure these on Selective Update
> when in
> Early Transport mode. Also fill crtc_state->psr2_su_area with full
> frame
> area on full frame update for DSC calculation.
> 
> v2: move psr2_su_area under skip_sel_fetch_set_loop label
> 
> Bspec: 68927, 71709
> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as
> possible")
> Cc: <stable@vger.kernel.org> # v6.9+
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Link:
> https://patch.msgid.link/20260304113011.626542-5-jouni.hogander@intel.com
> (cherry picked from commit 3140af2fab505a4cd47d516284529bf1585628be)
> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 3848cd4fba0e..b7302a32ded4 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2619,6 +2619,12 @@ void
> intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
>  
>  	intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc-
> >pipe),
>  			   crtc_state->pipe_srcsz_early_tpt);
> +
> +	if (!crtc_state->dsc.compression_enable)
> +		return;
> +
> +	intel_dsc_su_et_parameters_configure(dsb, encoder,
> crtc_state,
> +					    
> drm_rect_height(&crtc_state->psr2_su_area));
>  }
>  
>  static void psr2_man_trk_ctl_calc(struct intel_crtc_state
> *crtc_state,
> @@ -3040,6 +3046,10 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	}
>  
>  skip_sel_fetch_set_loop:
> +	if (full_update)
> +		clip_area_update(&crtc_state->psr2_su_area,
> &crtc_state->pipe_src,
> +				 &crtc_state->pipe_src);
> +
>  	psr2_man_trk_ctl_calc(crtc_state, full_update);
>  	crtc_state->pipe_srcsz_early_tpt =
>  		psr2_pipe_srcsz_early_tpt_calc(crtc_state,
> full_update);
>