* [PATCH] mips: ralink: update CPU clock index
@ 2026-02-24 2:22 Shiji Yang
2026-02-24 7:31 ` Sergio Paracuellos
2026-04-01 20:34 ` Thomas Bogendoerfer
0 siblings, 2 replies; 3+ messages in thread
From: Shiji Yang @ 2026-02-24 2:22 UTC (permalink / raw)
To: linux-mips, linux-kernel
Cc: John Crispin, Sergio Paracuellos, Thomas Bogendoerfer, stable,
Mieczyslaw Nalewaj
Update CPU clock index to match the clock driver changes.
Fixes: d34db686a3d7 ("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs")
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
arch/mips/ralink/clk.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 9db73fcac..5c1eb46ef 100644
--- a/arch/mips/ralink/clk.c
+++ b/arch/mips/ralink/clk.c
@@ -21,16 +21,16 @@ static const char *clk_cpu(int *idx)
{
switch (ralink_soc) {
case RT2880_SOC:
- *idx = 0;
+ *idx = 1;
return "ralink,rt2880-sysc";
case RT3883_SOC:
- *idx = 0;
+ *idx = 1;
return "ralink,rt3883-sysc";
case RT305X_SOC_RT3050:
- *idx = 0;
+ *idx = 1;
return "ralink,rt3050-sysc";
case RT305X_SOC_RT3052:
- *idx = 0;
+ *idx = 1;
return "ralink,rt3052-sysc";
case RT305X_SOC_RT3350:
*idx = 1;
--
2.51.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] mips: ralink: update CPU clock index
2026-02-24 2:22 [PATCH] mips: ralink: update CPU clock index Shiji Yang
@ 2026-02-24 7:31 ` Sergio Paracuellos
2026-04-01 20:34 ` Thomas Bogendoerfer
1 sibling, 0 replies; 3+ messages in thread
From: Sergio Paracuellos @ 2026-02-24 7:31 UTC (permalink / raw)
To: Shiji Yang
Cc: linux-mips, linux-kernel, John Crispin, Thomas Bogendoerfer,
stable, Mieczyslaw Nalewaj
On Tue, Feb 24, 2026 at 3:23 AM Shiji Yang <yangshiji66@outlook.com> wrote:
>
> Update CPU clock index to match the clock driver changes.
>
> Fixes: d34db686a3d7 ("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs")
> Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
> Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
> ---
> arch/mips/ralink/clk.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Thanks,
Sergio Paracuellos
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] mips: ralink: update CPU clock index
2026-02-24 2:22 [PATCH] mips: ralink: update CPU clock index Shiji Yang
2026-02-24 7:31 ` Sergio Paracuellos
@ 2026-04-01 20:34 ` Thomas Bogendoerfer
1 sibling, 0 replies; 3+ messages in thread
From: Thomas Bogendoerfer @ 2026-04-01 20:34 UTC (permalink / raw)
To: Shiji Yang
Cc: linux-mips, linux-kernel, John Crispin, Sergio Paracuellos,
stable, Mieczyslaw Nalewaj
On Tue, Feb 24, 2026 at 10:22:50AM +0800, Shiji Yang wrote:
> Update CPU clock index to match the clock driver changes.
>
> Fixes: d34db686a3d7 ("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs")
> Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
> Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
> ---
> arch/mips/ralink/clk.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
applied to mips-fixes
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-02-24 2:22 [PATCH] mips: ralink: update CPU clock index Shiji Yang
2026-02-24 7:31 ` Sergio Paracuellos
2026-04-01 20:34 ` Thomas Bogendoerfer
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