From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: Biju <biju.das.au@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Chris Brandt <chris.brandt@renesas.com>,
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
Sam Ravnborg <sam@ravnborg.org>,
dri-devel@lists.freedesktop.org,
linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
stable@vger.kernel.org
Subject: Re: [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay
Date: Fri, 3 Apr 2026 19:46:22 +0200 [thread overview]
Message-ID: <ac_87h-5d24BJmDX@tom-desktop> (raw)
In-Reply-To: <20260330104450.128512-3-biju.das.jz@bp.renesas.com>
Hi Biju,
Thanks for your patch.
On Mon, Mar 30, 2026 at 11:44:45AM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1,
> requires waiting at least 1 msec after deasserting the CMN_RSTB signal
> before the DSI-Tx module is ready. Increase the delay from 1 usec to
> 1 msec by replacing udelay(1) with fsleep(1000) for RZ/G2L SoCs.
>
Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Kind Regards,
Tommaso
> Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v2->v3:
> * Moved the patch from patch#4 to patch#2.
> * Added fixes tag.
> * Updated commit description.
> v1->v2:
> * Updated commit header and description.
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index ff95cb9a7de5..9d9f77d8f949 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi *dsi,
> if (ret < 0)
> return ret;
>
> - udelay(1);
> + fsleep(1000);
>
> return 0;
> }
> --
> 2.43.0
>
prev parent reply other threads:[~2026-04-03 17:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260330104450.128512-1-biju.das.jz@bp.renesas.com>
2026-03-30 10:44 ` [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() Biju
2026-04-03 17:45 ` Tommaso Merciai
2026-03-30 10:44 ` [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay Biju
2026-04-03 17:46 ` Tommaso Merciai [this message]
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