* [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() [not found] <20260330104450.128512-1-biju.das.jz@bp.renesas.com> @ 2026-03-30 10:44 ` Biju 2026-04-03 17:45 ` Tommaso Merciai 2026-03-30 10:44 ` [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay Biju 1 sibling, 1 reply; 4+ messages in thread From: Biju @ 2026-03-30 10:44 UTC (permalink / raw) To: Biju Das, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter Cc: Chris Brandt, Laurent Pinchart, Sam Ravnborg, dri-devel, linux-renesas-soc, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad, Biju Das, stable From: Biju Das <biju.das.jz@bp.renesas.com> The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1, requires display timings to be set after the HS clock is started. Move rzg2l_mipi_dsi_set_display_timing() from rzg2l_mipi_dsi_atomic_pre_enable() to rzg2l_mipi_dsi_atomic_enable(), placing it after rzg2l_mipi_dsi_start_hs_clock(). Drop the unused ret variable from rzg2l_mipi_dsi_atomic_pre_enable(). Fixes: 5ce16c169a4c ("drm: renesas: rz-du: Add atomic_pre_enable") Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver") Cc: stable@vger.kernel.org Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v2->v3: * No change. v2: * New patch --- drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c index a87a301326c7..ff95cb9a7de5 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c @@ -1025,29 +1025,33 @@ static void rzg2l_mipi_dsi_atomic_pre_enable(struct drm_bridge *bridge, const struct drm_display_mode *mode; struct drm_connector *connector; struct drm_crtc *crtc; - int ret; connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; - ret = rzg2l_mipi_dsi_startup(dsi, mode); - if (ret < 0) - return; - - rzg2l_mipi_dsi_set_display_timing(dsi, mode); + rzg2l_mipi_dsi_startup(dsi, mode); } static void rzg2l_mipi_dsi_atomic_enable(struct drm_bridge *bridge, struct drm_atomic_state *state) { struct rzg2l_mipi_dsi *dsi = bridge_to_rzg2l_mipi_dsi(bridge); + const struct drm_display_mode *mode; + struct drm_connector *connector; + struct drm_crtc *crtc; int ret; ret = rzg2l_mipi_dsi_start_hs_clock(dsi); if (ret < 0) goto err_stop; + connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); + crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; + mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; + + rzg2l_mipi_dsi_set_display_timing(dsi, mode); + ret = rzg2l_mipi_dsi_start_video(dsi); if (ret < 0) goto err_stop_clock; -- 2.43.0 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() 2026-03-30 10:44 ` [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() Biju @ 2026-04-03 17:45 ` Tommaso Merciai 0 siblings, 0 replies; 4+ messages in thread From: Tommaso Merciai @ 2026-04-03 17:45 UTC (permalink / raw) To: Biju Cc: Biju Das, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter, Chris Brandt, Laurent Pinchart, Sam Ravnborg, dri-devel, linux-renesas-soc, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad, stable Hi Biju, Thanks for your patch. On Mon, Mar 30, 2026 at 11:44:44AM +0100, Biju wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1, > requires display timings to be set after the HS clock is started. Move > rzg2l_mipi_dsi_set_display_timing() from > rzg2l_mipi_dsi_atomic_pre_enable() to rzg2l_mipi_dsi_atomic_enable(), > placing it after rzg2l_mipi_dsi_start_hs_clock(). Drop the unused ret > variable from rzg2l_mipi_dsi_atomic_pre_enable(). > Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Kind Regards, Tommaso > Fixes: 5ce16c169a4c ("drm: renesas: rz-du: Add atomic_pre_enable") > Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver") > Cc: stable@vger.kernel.org > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v2->v3: > * No change. > v2: > * New patch > --- > drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > index a87a301326c7..ff95cb9a7de5 100644 > --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > @@ -1025,29 +1025,33 @@ static void rzg2l_mipi_dsi_atomic_pre_enable(struct drm_bridge *bridge, > const struct drm_display_mode *mode; > struct drm_connector *connector; > struct drm_crtc *crtc; > - int ret; > > connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); > crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; > mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; > > - ret = rzg2l_mipi_dsi_startup(dsi, mode); > - if (ret < 0) > - return; > - > - rzg2l_mipi_dsi_set_display_timing(dsi, mode); > + rzg2l_mipi_dsi_startup(dsi, mode); > } > > static void rzg2l_mipi_dsi_atomic_enable(struct drm_bridge *bridge, > struct drm_atomic_state *state) > { > struct rzg2l_mipi_dsi *dsi = bridge_to_rzg2l_mipi_dsi(bridge); > + const struct drm_display_mode *mode; > + struct drm_connector *connector; > + struct drm_crtc *crtc; > int ret; > > ret = rzg2l_mipi_dsi_start_hs_clock(dsi); > if (ret < 0) > goto err_stop; > > + connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); > + crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; > + mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode; > + > + rzg2l_mipi_dsi_set_display_timing(dsi, mode); > + > ret = rzg2l_mipi_dsi_start_video(dsi); > if (ret < 0) > goto err_stop_clock; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay [not found] <20260330104450.128512-1-biju.das.jz@bp.renesas.com> 2026-03-30 10:44 ` [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() Biju @ 2026-03-30 10:44 ` Biju 2026-04-03 17:46 ` Tommaso Merciai 1 sibling, 1 reply; 4+ messages in thread From: Biju @ 2026-03-30 10:44 UTC (permalink / raw) To: Biju Das, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter Cc: Chris Brandt, Laurent Pinchart, Sam Ravnborg, dri-devel, linux-renesas-soc, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad, Biju Das, stable From: Biju Das <biju.das.jz@bp.renesas.com> The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1, requires waiting at least 1 msec after deasserting the CMN_RSTB signal before the DSI-Tx module is ready. Increase the delay from 1 usec to 1 msec by replacing udelay(1) with fsleep(1000) for RZ/G2L SoCs. Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver") Cc: stable@vger.kernel.org Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v2->v3: * Moved the patch from patch#4 to patch#2. * Added fixes tag. * Updated commit description. v1->v2: * Updated commit header and description. --- drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c index ff95cb9a7de5..9d9f77d8f949 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi *dsi, if (ret < 0) return ret; - udelay(1); + fsleep(1000); return 0; } -- 2.43.0 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay 2026-03-30 10:44 ` [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay Biju @ 2026-04-03 17:46 ` Tommaso Merciai 0 siblings, 0 replies; 4+ messages in thread From: Tommaso Merciai @ 2026-04-03 17:46 UTC (permalink / raw) To: Biju Cc: Biju Das, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter, Chris Brandt, Laurent Pinchart, Sam Ravnborg, dri-devel, linux-renesas-soc, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad, stable Hi Biju, Thanks for your patch. On Mon, Mar 30, 2026 at 11:44:45AM +0100, Biju wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1, > requires waiting at least 1 msec after deasserting the CMN_RSTB signal > before the DSI-Tx module is ready. Increase the delay from 1 usec to > 1 msec by replacing udelay(1) with fsleep(1000) for RZ/G2L SoCs. > Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Kind Regards, Tommaso > Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver") > Cc: stable@vger.kernel.org > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v2->v3: > * Moved the patch from patch#4 to patch#2. > * Added fixes tag. > * Updated commit description. > v1->v2: > * Updated commit header and description. > --- > drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > index ff95cb9a7de5..9d9f77d8f949 100644 > --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi *dsi, > if (ret < 0) > return ret; > > - udelay(1); > + fsleep(1000); > > return 0; > } > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 4+ messages in thread
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2026-03-30 10:44 ` [PATCH v3 1/3] drm: renesas: rzg2l_mipi_dsi: Move rzg2l_mipi_dsi_set_display_timing() Biju
2026-04-03 17:45 ` Tommaso Merciai
2026-03-30 10:44 ` [PATCH v3 2/3] drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay Biju
2026-04-03 17:46 ` Tommaso Merciai
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