From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91562C4708F for ; Tue, 1 Jun 2021 18:06:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 79F2761026 for ; Tue, 1 Jun 2021 18:06:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231331AbhFASId (ORCPT ); Tue, 1 Jun 2021 14:08:33 -0400 Received: from mga04.intel.com ([192.55.52.120]:57454 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234624AbhFASIc (ORCPT ); Tue, 1 Jun 2021 14:08:32 -0400 IronPort-SDR: rsuB/CyQHFx+s5lCoOYr9jZX8moTJELD6SEm9IA9gpnZONNhreEsxpABeYFQYorymGQzLB6CF4 /A/49z1nOd7A== X-IronPort-AV: E=McAfee;i="6200,9189,10002"; a="201737660" X-IronPort-AV: E=Sophos;i="5.83,240,1616482800"; d="scan'208";a="201737660" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jun 2021 11:06:27 -0700 IronPort-SDR: gbkuiIM/QQ0lpuoOt9sfUl2m5Cw0i4kmsm9POAuWPIhph2dJiDrfZHgY9YTdfkvRUqcpjHuJCM c8uRJlsTAB1w== X-IronPort-AV: E=Sophos;i="5.83,240,1616482800"; d="scan'208";a="479384648" Received: from pychiu-mobl.amr.corp.intel.com (HELO [10.209.21.197]) ([10.209.21.197]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jun 2021 11:06:27 -0700 Subject: Re: [PATCH v3 3/5] x86/fpu: Clean up the fpu__clear() variants To: Andy Lutomirski , Thomas Gleixner , the arch/x86 maintainers Cc: stable@vger.kernel.org, syzbot+2067e764dbcd10721e2e@syzkaller.appspotmail.com References: <878s3u34iy.ffs@nanos.tec.linutronix.de> <603011b5-9479-3aac-78ee-74b9b5a5ef7c@kernel.org> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <603011b5-9479-3aac-78ee-74b9b5a5ef7c@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On to patch 3: > fpu__clear_all() and fpu__clear_user_states() share an implementation, > and the resulting code is almost unreadable. Clean it up. Could we flesh this changelog out a bit? I basically write these in the process of understanding what the patch does, so this is less of "your changelog needs help" and more of, "here's some more detail if you want it": fpu__clear() currently resets both register state and kernel XSAVE buffer state. It has two modes: one for all state (supervisor and user) and another for user state only. fpu__clear_all() uses the "all state" (user_only=0) mode, while a number of signal paths use the user_only=1 mode. Make fpu__clear() work only for user state (user_only=1) and remove the "all state" (user_only=0) code. Rename it to match so it can be used by the signal paths. Replace the "all state" (user_only=0) fpu__clear() functionality. Use the TIF_NEED_FPU_LOAD functionality instead of making any actual hardware registers changes in this path. > arch/x86/kernel/fpu/core.c | 63 +++++++++++++++++++++++++------------- > 1 file changed, 42 insertions(+), 21 deletions(-) > > diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c > index 571220ac8bea..a01cbb6a08bb 100644 > --- a/arch/x86/kernel/fpu/core.c > +++ b/arch/x86/kernel/fpu/core.c > @@ -354,45 +354,66 @@ static inline void copy_init_fpstate_to_fpregs(u64 features_mask) > } > > /* > - * Clear the FPU state back to init state. > - * > - * Called by sys_execve(), by the signal handler code and by various > - * error paths. > + * Reset current's user FPU states to the init states. current's supervisor > + * states, if any, are not modified by this function. The XSTATE header > + * in memory is assumed to be intact when this is called. > */ > -static void fpu__clear(struct fpu *fpu, bool user_only) > +void fpu__clear_user_states(struct fpu *fpu) > { > WARN_ON_FPU(fpu != ¤t->thread.fpu); > > if (!static_cpu_has(X86_FEATURE_FPU)) { > - fpu__drop(fpu); > - fpu__initialize(fpu); > + fpu__clear_all(fpu); > return; > } > > fpregs_lock(); > > - if (user_only) { > - if (!fpregs_state_valid(fpu, smp_processor_id()) && > - xfeatures_mask_supervisor()) > - copy_kernel_to_xregs(&fpu->state.xsave, > - xfeatures_mask_supervisor()); > - copy_init_fpstate_to_fpregs(xfeatures_mask_user()); > - } else { > - copy_init_fpstate_to_fpregs(xfeatures_mask_all); > - } > + /* > + * Ensure that current's supervisor states are loaded into > + * their corresponding registers. > + */ > + if (!fpregs_state_valid(fpu, smp_processor_id()) && > + xfeatures_mask_supervisor()) > + copy_kernel_to_xregs(&fpu->state.xsave, > + xfeatures_mask_supervisor()); > > + /* > + * Reset user states in registers. > + */ > + copy_init_fpstate_to_fpregs(xfeatures_mask_user()); > + > + /* > + * Now all FPU registers have their desired values. Inform the > + * FPU state machine that current's FPU registers are in the > + * hardware registers. > + */ > fpregs_mark_activate(); > + > fpregs_unlock(); > } > > -void fpu__clear_user_states(struct fpu *fpu) > -{ > - fpu__clear(fpu, true); > -} > +/* > + * Reset current's FPU registers (user and supervisor) to their INIT values. > + * This is used by execve(); out of an abundance of caution, it completely > + * wipes and resets the XSTATE buffer in memory. > + * > + * Note that XSAVE (unlike XSAVES) expects the XSTATE buffer in memory to > + * be valid, so there are certain forms of corruption of the XSTATE buffer > + * in memory that would survive initializing the FPU registers and XSAVEing > + * them to memory. > + * > + * This does not change the actual hardware registers; when fpu__clear_all() > + * returns, TIF_NEED_FPU_LOAD will be set, and a subsequent exit to user mode > + * will reload the hardware registers from memory. > + */ > void fpu__clear_all(struct fpu *fpu) > { > - fpu__clear(fpu, false); > + fpregs_lock(); > + fpu__drop(fpu); > + fpu__initialize(fpu); > + fpregs_unlock(); > } Nit: Could we move the detailed comments about TIF_NEED_FPU_LOAD right next to the fpu__initialize() call? It would make it painfully obvious which call is responsible. The naming isn't super helpful here.