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Wed, 05 Aug 2026 06:29:16 -0700 (PDT) Date: Wed, 5 Aug 2026 14:30:26 +0100 From: Nuno =?utf-8?B?U8Oh?= To: Peter Ujfalusi Cc: Mark Brown , Liam Girdwood , Lars-Peter Clausen , Nuno =?utf-8?B?U8Oh?= , linux-sound@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH] ASoC: adau1761: sort the register default table Message-ID: References: <20260805122713.11376-1-peter.ujfalusi@linux.intel.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260805122713.11376-1-peter.ujfalusi@linux.intel.com> On Wed, Aug 05, 2026 at 03:27:13PM +0300, Peter Ujfalusi wrote: > reg_defaults must be sorted by ascending register address, as > regcache_lookup_reg() locates entries in it with bsearch(). See commit > fd80df352ba1 ("regcache: Add support for sorting defaults arrays"). > > The table lists the ADAU1761 specific registers (0x4008 and up) before > the block shared with the ADAU1381/ADAU1781, which starts at > ADAU17X1_CLOCK_CONTROL (0x4000), so bsearch() descends into the wrong > half and 28 of the 52 entries are unreachable. > regcache_reg_needs_sync() then cannot compare them against their default > and reports that a sync is needed, so they are written to the device on > every regcache_sync() even when they were never touched. > > Sort the table by register address. > > Fixes: dab464b60b24 ("ASoC: Add ADAU1361/ADAU1761 audio CODEC support") > Cc: stable@vger.kernel.org > Signed-off-by: Peter Ujfalusi > --- Acked-by: Nuno Sá > sound/soc/codecs/adau1761.c | 34 +++++++++++++++++----------------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c > index a70c46dd5d76..27ce03b0fb91 100644 > --- a/sound/soc/codecs/adau1761.c > +++ b/sound/soc/codecs/adau1761.c > @@ -68,23 +68,33 @@ > #define ADAU1761_FIRMWARE "adau1761.bin" > > static const struct reg_default adau1761_reg_defaults[] = { > - { ADAU1761_DEJITTER, 0x03 }, > + { ADAU17X1_CLOCK_CONTROL, 0x00 }, > + { ADAU17X1_PLL_CONTROL, 0x00 }, > { ADAU1761_DIGMIC_JACKDETECT, 0x00 }, > + { ADAU17X1_REC_POWER_MGMT, 0x00 }, > { ADAU1761_REC_MIXER_LEFT0, 0x00 }, > { ADAU1761_REC_MIXER_LEFT1, 0x00 }, > { ADAU1761_REC_MIXER_RIGHT0, 0x00 }, > { ADAU1761_REC_MIXER_RIGHT1, 0x00 }, > { ADAU1761_LEFT_DIFF_INPUT_VOL, 0x00 }, > + { ADAU1761_RIGHT_DIFF_INPUT_VOL, 0x00 }, > + { ADAU17X1_MICBIAS, 0x00 }, > { ADAU1761_ALC_CTRL0, 0x00 }, > { ADAU1761_ALC_CTRL1, 0x00 }, > { ADAU1761_ALC_CTRL2, 0x00 }, > { ADAU1761_ALC_CTRL3, 0x00 }, > - { ADAU1761_RIGHT_DIFF_INPUT_VOL, 0x00 }, > - { ADAU1761_PLAY_LR_MIXER_LEFT, 0x00 }, > + { ADAU17X1_SERIAL_PORT0, 0x00 }, > + { ADAU17X1_SERIAL_PORT1, 0x00 }, > + { ADAU17X1_CONVERTER0, 0x00 }, > + { ADAU17X1_CONVERTER1, 0x00 }, > + { ADAU17X1_ADC_CONTROL, 0x00 }, > + { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 }, > + { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 }, > { ADAU1761_PLAY_MIXER_LEFT0, 0x00 }, > { ADAU1761_PLAY_MIXER_LEFT1, 0x00 }, > { ADAU1761_PLAY_MIXER_RIGHT0, 0x00 }, > { ADAU1761_PLAY_MIXER_RIGHT1, 0x00 }, > + { ADAU1761_PLAY_LR_MIXER_LEFT, 0x00 }, > { ADAU1761_PLAY_LR_MIXER_RIGHT, 0x00 }, > { ADAU1761_PLAY_MIXER_MONO, 0x00 }, > { ADAU1761_PLAY_HP_LEFT_VOL, 0x00 }, > @@ -93,20 +103,6 @@ static const struct reg_default adau1761_reg_defaults[] = { > { ADAU1761_PLAY_LINE_RIGHT_VOL, 0x00 }, > { ADAU1761_PLAY_MONO_OUTPUT_VOL, 0x00 }, > { ADAU1761_POP_CLICK_SUPPRESS, 0x00 }, > - { ADAU1761_JACK_DETECT_PIN, 0x00 }, > - { ADAU1761_CLK_ENABLE0, 0x00 }, > - { ADAU1761_CLK_ENABLE1, 0x00 }, > - { ADAU17X1_CLOCK_CONTROL, 0x00 }, > - { ADAU17X1_PLL_CONTROL, 0x00 }, > - { ADAU17X1_REC_POWER_MGMT, 0x00 }, > - { ADAU17X1_MICBIAS, 0x00 }, > - { ADAU17X1_SERIAL_PORT0, 0x00 }, > - { ADAU17X1_SERIAL_PORT1, 0x00 }, > - { ADAU17X1_CONVERTER0, 0x00 }, > - { ADAU17X1_CONVERTER1, 0x00 }, > - { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 }, > - { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 }, > - { ADAU17X1_ADC_CONTROL, 0x00 }, > { ADAU17X1_PLAY_POWER_MGMT, 0x00 }, > { ADAU17X1_DAC_CONTROL0, 0x00 }, > { ADAU17X1_DAC_CONTROL1, 0x00 }, > @@ -114,12 +110,16 @@ static const struct reg_default adau1761_reg_defaults[] = { > { ADAU17X1_SERIAL_PORT_PAD, 0xaa }, > { ADAU17X1_CONTROL_PORT_PAD0, 0xaa }, > { ADAU17X1_CONTROL_PORT_PAD1, 0x00 }, > + { ADAU1761_JACK_DETECT_PIN, 0x00 }, > + { ADAU1761_DEJITTER, 0x03 }, > { ADAU17X1_DSP_SAMPLING_RATE, 0x01 }, > { ADAU17X1_SERIAL_INPUT_ROUTE, 0x00 }, > { ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x00 }, > { ADAU17X1_DSP_ENABLE, 0x00 }, > { ADAU17X1_DSP_RUN, 0x00 }, > { ADAU17X1_SERIAL_SAMPLING_RATE, 0x00 }, > + { ADAU1761_CLK_ENABLE0, 0x00 }, > + { ADAU1761_CLK_ENABLE1, 0x00 }, > }; > > static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1); > -- > 2.55.0 >