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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Colin Winegarden , Rukhsana Ansari , Kalesh AP , horms@kernel.org, linux-kernel@vger.kernel.org, raphaelcf@meta.com, stable@vger.kernel.org, llvm@lists.linux.dev Subject: Re: [PATCH net v3] bnxt_en: Bound SW TPA IDs to prevent crashes Message-ID: Mail-Followup-To: Joe Damato , Michael Chan , netdev@vger.kernel.org, Pavan Chebbi , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Colin Winegarden , Rukhsana Ansari , Kalesh AP , horms@kernel.org, linux-kernel@vger.kernel.org, raphaelcf@meta.com, stable@vger.kernel.org, llvm@lists.linux.dev References: <20260827185700.2157164-1-joe@dama.to> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Aug 27, 2026 at 05:00:29PM -0700, Michael Chan wrote: > On Thu, Aug 27, 2026 at 4:41 PM Joe Damato wrote: > > > > On Thu, Aug 27, 2026 at 04:07:16PM -0700, Michael Chan wrote: > > > On Thu, Aug 27, 2026 at 11:57 AM Joe Damato wrote: > > > > > > > @@ -3831,6 +3834,7 @@ static int bnxt_alloc_tpa_info(struct bnxt *bp) > > > > int i, rc; > > > > > > > > bp->max_tpa = MAX_TPA; > > > > + bp->max_tpa_roundup_size = MAX_TPA; > > > > > > This is strictly not needed. If we return early below, it means the > > > chip does not support TPA at all. We skip allocating the TPA array > > > for every ring, so it really makes no difference. > > > > > > BNXT_SUPPORTS_TPA() will be false if we return early. LRO and HW_GRO > > > will not be supported. So I would say it's a false positive from > > > Sashiko. Thanks. > > > > Sorry, I should have been more explicit in my last message: is it worth a > > respin to remove this? Unless I am misunderstanding something, it's harmless > > and while not necessary, might be more clear for a human reader? > > > > Yes, the extra line is harmless. But I think it will further confuse > the reader (or AI) into thinking that TPA is supported when we return > early. I slightly prefer not adding this line. If you end up > re-spinning, maybe add an extra comment explaining that TPA is not > supported when we return early? Thanks. I think I'll propose something like this for the next version: @@ -3832,6 +3835,10 @@ static int bnxt_alloc_tpa_info(struct bnxt *bp) bp->max_tpa = MAX_TPA; if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { + /* TPA is not supported at all, so there is nothing to + * allocate. BNXT_SUPPORTS_TPA() is false in this case and + * neither LRO nor HW GRO can be enabled. + */ if (!bp->max_tpa_v2) return 0; bp->max_tpa = min_t(u16, bp->max_tpa_v2, MAX_TPA_P5); @@ -3839,6 +3846,7 @@ static int bnxt_alloc_tpa_info(struct bnxt *bp) if (bp->max_tpa <= 32 && BNXT_CHIP_P5(bp) && !BNXT_NPAR(bp)) bp->max_tpa = MAX_TPA_P5; } + bp->max_tpa_roundup_size = roundup_pow_of_two(bp->max_tpa); Because otherwise max_tpa_roundup_size would be 0 and bnxt_alloc_one_tpa_info (and other tpa functions) would use an alloc size of 0 and return ZERO_SIZE_PTR (non-NULL) which would then break checks like: if (!rxr->rx_tpa) because it would be ZERO_SIZE_PTR instead of NULL. Am I getting that right?