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[34.142.211.105]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a49858c123sm831538a91.3.2026.09.28.11.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2026 11:25:42 -0700 (PDT) Date: Mon, 28 Sep 2026 18:25:34 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: Catalin Marinas , Jonathan Corbet , iommu@lists.linux.dev, "Joerg Roedel (AMD)" , Jean-Philippe Brucker , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Mark Rutland , Randy Dunlap , Robin Murphy , Shuah Khan , Will Deacon , David Matlack , Jean-Philippe Brucker , Jonathan Cameron , Nicolin Chen , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja , Mostafa Saleh , stable@vger.kernel.org, Vijayanand Jitta Subject: Re: [PATCH v7 8/9] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Message-ID: References: <0-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> <8-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> On Mon, Sep 21, 2026 at 08:55:16PM -0300, Jason Gunthorpe wrote: > The range-invalidation logic has long had a FIXME that there is not enough > information to properly compute the range invalidation. There is also > subtly not enough information to properly compute the single stride > either. > > Change tlbi to use the information format that iommupt is going to use for > ARM. This prepares the invalidation code to support iommupt and fixes two > small limitations with the current code. > > iommupt is designed to accumulate all invalidation into a single gather, > then the iommu driver should issue a small number of commands to execute > the gather to control invalidation latency. This is in contrast to > io-pgtable-arm.c which generates many gather flushes and direct walk cache > flushes as it progresses. > > To accommodate this the gather will accumulate "damage" in bitmaps, one > for leaf changes and one for table changes. This is enough information for > SMMUv3 to compute the proper stride for single invalidation and to > generate ideal hints for range invalidation. > > Change the inner workings of the tlbi process to directly use this > new-style gather description with the idea that the iommupt conversion > will just direct assign the gather fields to the tlbi. > > Rework the three places creating the tlbi to express their needs in > terms of the new bitmaps. > > 1) Simple iotlb invalidation always gets a single range of leaf > levels, so it can set a single leaf bit > > 2) Walk invalidation is expected to clear the table and all the leaves it > could contain. Set a single table bit and all the leaf bits. > > There is a weakness in the existing io-pgtable where it double > invalidates the leaves, once through the arm_smmu_tlb_inv_walk() then > again through the gather. Since these are separate operations they are > not capped by the invalidation count limits and a single unmap may end > up doing thousands of tlbi commands. Eventually converting to iommupt's > gather only approach will correct this. > > 3) SVA invalidation has no idea what the MM did, so it will set all > the bits in the bitmaps. > > This corrects another weakness where the range-invalidation logic > was generating hints assuming the #2 rules which isn't correct > for SVA. > > Reviewed-by: Nicolin Chen > Tested-by: Nicolin Chen > Signed-off-by: Jason Gunthorpe Reviewed-by: Pranjal Shrivastava Thanks, Praan