From: Sean Christopherson <seanjc@google.com>
To: Sasha Levin <sashal@kernel.org>
Cc: stable@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
SimonP <simonp.git@mailbox.org>
Subject: Re: [PATCH 7.2.y] KVM: x86/mmu: Cope with the SS bit being set in #NPF exit codes
Date: Wed, 21 Oct 2026 18:40:23 -0700 [thread overview]
Message-ID: <atlph4I9lFbPpzqe@google.com> (raw)
In-Reply-To: <20261021152923.290681-1-sashal@kernel.org>
On Wed, Oct 21, 2026, Sasha Levin wrote:
> From: Paolo Bonzini <pbonzini@redhat.com>
>
> [ Upstream commit e90ab3669181c6469e3647ef2b30ae408275f496 ]
>
> When running Hyper-V from Windows 11, KVM is seeing the SS bit set
> in nested page fault error codes produced for shadowed NPT. The AMD
> manual is unclear about when SS is set, including whether it can be set
> when SupervisorShadowStackEn (bit 6) is not set in the MISC_CTL field
> of the VMCB.
>
> Nevertheless, the unexpected SS bit causes out of bounds accesses in
> permission_fault(), seen as either WARNs or UBSAN reports:
>
> kernel: UBSAN: array-index-out-of-bounds in arch/x86/kvm/mmu.h:225:27
> kernel: index 34 is out of range for type 'u16 [16]'
>
> (in this case, the page fault error code is 34*2=0x44, i.e. SS|U; the
> report shows SS|U|W happening as well). Fix the handling of unknown
> error codes by dropping SS and (with a WARN) any bits not among those
> that permission_fault() expects to receive.
>
> At the same time, given the uncertainty about when hardware sets SS,
> follow the processor's behavior when constructing the fault's error
> code, and preserve the SS bit as passed to FNAME(walk_addr_generic).
> While the behavior is surprising, there's a possibility that Hyper-V
> expects it (Hyper-V does not even enable CET unless it finds MBEC/GMET!),
> so retain the information when reflecting the fault to L1 instead of
> unconditionally discarding it.
>
> Bisection shows that this started happening with commit 687ee95c1b6d ("KVM:
> nSVM: enable GMET for guests"), even though SHSTK was available to guests
> since Linux 6.18. However, this is not because bit 1 of MISC_CTL (GMET)
> somehow enables reporting the SS bit; rather, it's simply that Hyper-V
> never uses CET unless GMET is also present. The WARN is reproducible
> even with gmet=0, with some hacking of kvm-unit-tests's cet.c testcase
> to ensure that the first access to the shadow stack triggers a page fault.
>
> Reported-by: SimonP <simonp.git@mailbox.org>
> Fixes: 8db428fd5229 ("KVM: SVM: Enable shadow stack virtualization for SVM")
> Cc: stable@vger.kernel.org
> Reviewed-by: Sean Christopherson <seanjc@google.com>
> Closes: https://lore.kernel.org/all/asUqYEisPp9MJ8mQ@rika.bernkas.tel
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> [ sashal: Adapted upstream w and fmt references to the existing mmu structure. ]
> Signed-off-by: Sasha Levin <sashal@kernel.org>
Acked-by: Sean Christopherson <seanjc@google.com>
prev parent reply other threads:[~2026-10-22 1:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 14:35 FAILED: patch "[PATCH] KVM: x86/mmu: Cope with the SS bit being set in #NPF exit" failed to apply to 7.2-stable tree gregkh
2026-10-21 15:30 ` [PATCH 7.2.y] KVM: x86/mmu: Cope with the SS bit being set in #NPF exit codes Sasha Levin
2026-10-22 1:40 ` Sean Christopherson [this message]
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